svn commit: r190413 - in head/sys: amd64/amd64 i386/isa

[John Baldwin]

Author: jhb
Date: Wed Mar 25 14:17:08 2009
New Revision: 190413
URL: http://svn.freebsd.org/changeset/base/190413

Log:
  Rename (fpu|npx)_cleanstate to (fpu|npx)_initialstate to better reflect
  their purpose.
  
  Inspired by:	bde
  MFC after:	1 month

Modified:
  head/sys/amd64/amd64/fpu.c
  head/sys/i386/isa/npx.c

Modified: head/sys/amd64/amd64/fpu.c
==============================================================================
--- head/sys/amd64/amd64/fpu.c	Wed Mar 25 14:11:29 2009	(r190412)
+++ head/sys/amd64/amd64/fpu.c	Wed Mar 25 14:17:08 2009	(r190413)
@@ -101,7 +101,7 @@ static	void	fpu_clean_state(void);
 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
     NULL, 1, "Floating point instructions executed in hardware");
 
-static	struct savefpu		fpu_cleanstate;
+static	struct savefpu		fpu_initialstate;
 
 /*
  * Initialize the floating point unit.  On the boot CPU we generate a
@@ -123,13 +123,13 @@ fpuinit(void)
 	mxcsr = __INITIAL_MXCSR__;
 	ldmxcsr(mxcsr);
 	if (PCPU_GET(cpuid) == 0) {
-		fxsave(&fpu_cleanstate);
-		if (fpu_cleanstate.sv_env.en_mxcsr_mask)
-			cpu_mxcsr_mask = fpu_cleanstate.sv_env.en_mxcsr_mask;
+		fxsave(&fpu_initialstate);
+		if (fpu_initialstate.sv_env.en_mxcsr_mask)
+			cpu_mxcsr_mask = fpu_initialstate.sv_env.en_mxcsr_mask;
 		else
 			cpu_mxcsr_mask = 0xFFBF;
-		bzero(fpu_cleanstate.sv_fp, sizeof(fpu_cleanstate.sv_fp));
-		bzero(fpu_cleanstate.sv_xmm, sizeof(fpu_cleanstate.sv_xmm));
+		bzero(fpu_initialstate.sv_fp, sizeof(fpu_initialstate.sv_fp));
+		bzero(fpu_initialstate.sv_xmm, sizeof(fpu_initialstate.sv_xmm));
 	}
 	start_emulating();
 	intr_restore(savecrit);
@@ -416,10 +416,11 @@ fpudna(void)
 
 	if ((pcb->pcb_flags & PCB_FPUINITDONE) == 0) {
 		/*
-		 * This is the first time this thread has used the FPU,
-		 * explicitly load sanitized registers.
+		 * This is the first time this thread has used the FPU or
+		 * the PCB doesn't contain a clean FPU state.  Explicitly
+		 * load an initial state.
 		 */
-		fxrstor(&fpu_cleanstate);
+		fxrstor(&fpu_initialstate);
 		if (pcb->pcb_initial_fpucw != __INITIAL_FPUCW__)
 			fldcw(&pcb->pcb_initial_fpucw);
 		pcb->pcb_flags |= PCB_FPUINITDONE;
@@ -453,7 +454,7 @@ fpugetregs(struct thread *td, struct sav
 	register_t s;
 
 	if ((td->td_pcb->pcb_flags & PCB_FPUINITDONE) == 0) {
-		bcopy(&fpu_cleanstate, addr, sizeof(fpu_cleanstate));
+		bcopy(&fpu_initialstate, addr, sizeof(fpu_initialstate));
 		addr->sv_env.en_cw = td->td_pcb->pcb_initial_fpucw;
 		return (_MC_FPOWNED_NONE);
 	}

Modified: head/sys/i386/isa/npx.c
==============================================================================
--- head/sys/i386/isa/npx.c	Wed Mar 25 14:11:29 2009	(r190412)
+++ head/sys/i386/isa/npx.c	Wed Mar 25 14:17:08 2009	(r190413)
@@ -181,7 +181,7 @@ SYSCTL_INT(_hw, HW_FLOATINGPT, floatingp
 static	volatile u_int		npx_intrs_while_probing;
 static	volatile u_int		npx_traps_while_probing;
 
-static	union savefpu		npx_cleanstate;
+static	union savefpu		npx_initialstate;
 static	bool_t			npx_ex16;
 static	bool_t			npx_exists;
 static	bool_t			npx_irq13;
@@ -423,24 +423,24 @@ npx_attach(dev)
 
 	s = intr_disable();
 	stop_emulating();
-	fpusave(&npx_cleanstate);
+	fpusave(&npx_initialstate);
 	start_emulating();
 #ifdef CPU_ENABLE_SSE
 	if (cpu_fxsr) {
-		if (npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask)
+		if (npx_initialstate.sv_xmm.sv_env.en_mxcsr_mask)
 			cpu_mxcsr_mask = 
-			    npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask;
+			    npx_initialstate.sv_xmm.sv_env.en_mxcsr_mask;
 		else
 			cpu_mxcsr_mask = 0xFFBF;
-		bzero(npx_cleanstate.sv_xmm.sv_fp,
-		    sizeof(npx_cleanstate.sv_xmm.sv_fp));
-		bzero(npx_cleanstate.sv_xmm.sv_xmm,
-		    sizeof(npx_cleanstate.sv_xmm.sv_xmm));
+		bzero(npx_initialstate.sv_xmm.sv_fp,
+		    sizeof(npx_initialstate.sv_xmm.sv_fp));
+		bzero(npx_initialstate.sv_xmm.sv_xmm,
+		    sizeof(npx_initialstate.sv_xmm.sv_xmm));
 		/* XXX might need even more zeroing. */
 	} else
 #endif
-		bzero(npx_cleanstate.sv_87.sv_ac,
-		    sizeof(npx_cleanstate.sv_87.sv_ac));
+		bzero(npx_initialstate.sv_87.sv_ac,
+		    sizeof(npx_initialstate.sv_87.sv_ac));
 	intr_restore(s);
 #ifdef I586_CPU_XXX
 	if (cpu_class == CPUCLASS_586 && npx_ex16 &&
@@ -798,9 +798,9 @@ npxdna(void)
 		/*
 		 * This is the first time this thread has used the FPU or
 		 * the PCB doesn't contain a clean FPU state.  Explicitly
-		 * load sanitized registers.
+		 * load an initial state.
 		 */
-		fpurstor(&npx_cleanstate);
+		fpurstor(&npx_initialstate);
 		if (pcb->pcb_initial_npxcw != __INITIAL_NPXCW__)
 			fldcw(&pcb->pcb_initial_npxcw);
 		pcb->pcb_flags |= PCB_NPXINITDONE;
@@ -900,7 +900,7 @@ npxgetregs(td, addr)
 		return (_MC_FPOWNED_NONE);
 
 	if ((td->td_pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
-		bcopy(&npx_cleanstate, addr, sizeof(npx_cleanstate));
+		bcopy(&npx_initialstate, addr, sizeof(npx_initialstate));
 		SET_FPU_CW(addr, td->td_pcb->pcb_initial_npxcw);
 		return (_MC_FPOWNED_NONE);
 	}