svn commit: r187417 - in head/sys: dev/re pci

[Pyun YongHyeon]

Author: yongari
Date: Mon Jan 19 02:31:27 2009
New Revision: 187417
URL: http://svn.freebsd.org/changeset/base/187417

Log:
  Sometimes RTL8168B seems to take long time to access GMII registers
  in device attach phase. Double GMII register access timeout value
  to fix the issue.
  
  Reported by:	wkoszek
  Tested by:	wkoszek

Modified:
  head/sys/dev/re/if_re.c
  head/sys/pci/if_rlreg.h

Modified: head/sys/dev/re/if_re.c
==============================================================================
--- head/sys/dev/re/if_re.c	Mon Jan 19 01:03:42 2009	(r187416)
+++ head/sys/dev/re/if_re.c	Mon Jan 19 02:31:27 2009	(r187417)
@@ -418,14 +418,14 @@ re_gmii_readreg(device_t dev, int phy, i
 
 	CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
 
-	for (i = 0; i < RL_TIMEOUT; i++) {
+	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);
 		if (rval & RL_PHYAR_BUSY)
 			break;
 		DELAY(100);
 	}
 
-	if (i == RL_TIMEOUT) {
+	if (i == RL_PHY_TIMEOUT) {
 		device_printf(sc->rl_dev, "PHY read failed\n");
 		return (0);
 	}
@@ -445,14 +445,14 @@ re_gmii_writereg(device_t dev, int phy, 
 	CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
 	    (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY);
 
-	for (i = 0; i < RL_TIMEOUT; i++) {
+	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);
 		if (!(rval & RL_PHYAR_BUSY))
 			break;
 		DELAY(100);
 	}
 
-	if (i == RL_TIMEOUT) {
+	if (i == RL_PHY_TIMEOUT) {
 		device_printf(sc->rl_dev, "PHY write failed\n");
 		return (0);
 	}

Modified: head/sys/pci/if_rlreg.h
==============================================================================
--- head/sys/pci/if_rlreg.h	Mon Jan 19 01:03:42 2009	(r187416)
+++ head/sys/pci/if_rlreg.h	Mon Jan 19 02:31:27 2009	(r187417)
@@ -937,6 +937,7 @@ struct rl_softc {
 	CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
 
 #define RL_TIMEOUT		1000
+#define RL_PHY_TIMEOUT		2000
 
 /*
  * General constants that are fun to know.