socsvn commit: r287171 - in soc2015/mihai/bhyve-on-arm-head/sys: arm/conf arm/fvp_ve-cortex_a15x1 boot/fdt/dts/arm
mihai at FreeBSD.org
mihai at FreeBSD.org
Tue Jun 16 19:06:07 UTC 2015
Author: mihai
Date: Tue Jun 16 19:06:05 2015
New Revision: 287171
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=287171
Log:
soc2015: mihai: bhyve-on-arm-head: simplified fvp_ve-cortex_a15x1.dts with only the gic, timer and uart
Deleted:
soc2015/mihai/bhyve-on-arm-head/sys/boot/fdt/dts/arm/fvp_ve-motherboard.dtsi
Modified:
soc2015/mihai/bhyve-on-arm-head/sys/arm/conf/FVP_VE_CORTEX_A15x1
soc2015/mihai/bhyve-on-arm-head/sys/arm/fvp_ve-cortex_a15x1/files.fvp_ve-cortex_a15x1
soc2015/mihai/bhyve-on-arm-head/sys/boot/fdt/dts/arm/fvp_ve-cortex_a15x1.dts
Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/conf/FVP_VE_CORTEX_A15x1
==============================================================================
--- soc2015/mihai/bhyve-on-arm-head/sys/arm/conf/FVP_VE_CORTEX_A15x1 Tue Jun 16 18:43:08 2015 (r287170)
+++ soc2015/mihai/bhyve-on-arm-head/sys/arm/conf/FVP_VE_CORTEX_A15x1 Tue Jun 16 19:06:05 2015 (r287171)
@@ -45,6 +45,10 @@
#options DIAGNOSTIC
#options ROOTDEVNAME=\"ufs:/dev/da0\"
+options MD_ROOT
+options MD_ROOT_SIZE=10240
+makeoptions MFS_IMAGE=/root/soc2015/mihai/ramdisk.img
+options ROOTDEVNAME=\"ffs:/dev/md0\"
# Pseudo devices
@@ -63,6 +67,11 @@
device iic
device iicbus
+
+# GIC
+device gic
+
+
# GPIO
device gpio
Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/fvp_ve-cortex_a15x1/files.fvp_ve-cortex_a15x1
==============================================================================
--- soc2015/mihai/bhyve-on-arm-head/sys/arm/fvp_ve-cortex_a15x1/files.fvp_ve-cortex_a15x1 Tue Jun 16 18:43:08 2015 (r287170)
+++ soc2015/mihai/bhyve-on-arm-head/sys/arm/fvp_ve-cortex_a15x1/files.fvp_ve-cortex_a15x1 Tue Jun 16 19:06:05 2015 (r287171)
@@ -3,7 +3,6 @@
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/bus_space_asm_generic.S standard
-arm/arm/gic.c standard
arm/fvp_ve-cortex_a15x1/sp804.c standard
arm/fvp_ve-cortex_a15x1/fvp_ve-cortex_a15x1_common.c standard
Modified: soc2015/mihai/bhyve-on-arm-head/sys/boot/fdt/dts/arm/fvp_ve-cortex_a15x1.dts
==============================================================================
--- soc2015/mihai/bhyve-on-arm-head/sys/boot/fdt/dts/arm/fvp_ve-cortex_a15x1.dts Tue Jun 16 18:43:08 2015 (r287170)
+++ soc2015/mihai/bhyve-on-arm-head/sys/boot/fdt/dts/arm/fvp_ve-cortex_a15x1.dts Tue Jun 16 19:06:05 2015 (r287171)
@@ -11,10 +11,9 @@
/ {
model = "FVP_VE_Cortex_A15x1";
- compatible = "arm,fvp_ve,cortex_a15x1", "arm,vexpress";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
+ compatible = "arm,fvp_ve,cortex_a15x1";
+ #address-cells = <1>;
+ #size-cells = <1>;
chosen { };
@@ -38,90 +37,58 @@
memory at 80000000 {
device_type = "memory";
- reg = <0 0x80000000 0 0x40000000>;
+ reg = <0x80000000 0x40000000>;
};
gic: interrupt-controller at 2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
+ compatible = "arm,cortex-a15-gic";
interrupt-controller;
- reg = <0 0x2c001000 0 0x1000>,
- <0 0x2c002000 0 0x2000>,
- <0 0x2c004000 0 0x2000>,
- <0 0x2c006000 0 0x2000>;
- interrupts = <1 9 0xf04>;
- };
-
- timer {
- compatible = "arm,armv7-timer";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0xf08>;
- };
-
- smb {
- compatible = "simple-bus";
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = /*<0 0 0x08000000 0x04000000>,
- <1 0 0x14000000 0x04000000>,
- <2 0 0x18000000 0x04000000>,*/
- <0 0 0x1c000000 0x04000000>;
-/* <4 0 0x0c000000 0x04000000>,
- <5 0 0x10000000 0x04000000>;*/
-
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 4>,
- <0 0 1 &gic 0 1 4>,
- <0 0 2 &gic 0 2 4>,
- <0 0 3 &gic 0 3 4>,
- <0 0 4 &gic 0 4 4>,
- <0 0 5 &gic 0 5 4>,
- <0 0 6 &gic 0 6 4>,
- <0 0 7 &gic 0 7 4>,
- <0 0 8 &gic 0 8 4>,
- <0 0 9 &gic 0 9 4>,
- <0 0 10 &gic 0 10 4>,
- <0 0 11 &gic 0 11 4>,
- <0 0 12 &gic 0 12 4>,
- <0 0 13 &gic 0 13 4>,
- <0 0 14 &gic 0 14 4>,
- <0 0 15 &gic 0 15 4>,
- <0 0 16 &gic 0 16 4>,
- <0 0 17 &gic 0 17 4>,
- <0 0 18 &gic 0 18 4>,
- <0 0 19 &gic 0 19 4>,
- <0 0 20 &gic 0 20 4>,
- <0 0 21 &gic 0 21 4>,
- <0 0 22 &gic 0 22 4>,
- <0 0 23 &gic 0 23 4>,
- <0 0 24 &gic 0 24 4>,
- <0 0 25 &gic 0 25 4>,
- <0 0 26 &gic 0 26 4>,
- <0 0 27 &gic 0 27 4>,
- <0 0 28 &gic 0 28 4>,
- <0 0 29 &gic 0 29 4>,
- <0 0 30 &gic 0 30 4>,
- <0 0 31 &gic 0 31 4>,
- <0 0 32 &gic 0 32 4>,
- <0 0 33 &gic 0 33 4>,
- <0 0 34 &gic 0 34 4>,
- <0 0 35 &gic 0 35 4>,
- <0 0 36 &gic 0 36 4>,
- <0 0 37 &gic 0 37 4>,
- <0 0 38 &gic 0 38 4>,
- <0 0 39 &gic 0 39 4>,
- <0 0 40 &gic 0 40 4>,
- <0 0 41 &gic 0 41 4>,
- <0 0 42 &gic 0 42 4>;
-
- /include/ "fvp_ve-motherboard.dtsi"
+ reg = <0x2c001000 0x1000>,
+ <0x2c002000 0x2000>,
+ <0x2c004000 0x2000>,
+ <0x2c006000 0x2000>;
+ };
+
+ v2m_serial0: uart at 1c090000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x1c090000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <37>;
+ };
+
+ v2m_serial1: uart at 1c0a0000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x1c0a0000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <38>;
+ };
+
+ v2m_serial2: uart at 1c0b0000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x1c0b0000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <39>;
+ };
+
+ v2m_serial3: uart at 1c0c0000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x1c0c0000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <40>;
+ };
+ v2m_timer01: timer at 1c110000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x1c110000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <34>;
+ };
+
+ v2m_timer23: timer at 1c120000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x1c120000 0x1000>;
+ interrupt-parent=<&gic>;
+ interrupts = <35>;
};
};
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