socsvn commit: r286988 - soc2015/pratiksinghal/cubie-head/sys/arm/allwinner
pratiksinghal at FreeBSD.org
pratiksinghal at FreeBSD.org
Fri Jun 12 09:24:05 UTC 2015
Author: pratiksinghal
Date: Fri Jun 12 09:24:03 2015
New Revision: 286988
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=286988
Log:
Removed trailing whitespace
Modified:
soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c
Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c
==============================================================================
--- soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c Fri Jun 12 07:50:34 2015 (r286987)
+++ soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c Fri Jun 12 09:24:03 2015 (r286988)
@@ -38,7 +38,7 @@
#include <sys/resource.h>
#include <sys/rman.h>
#include <sys/sysctl.h>
-#include <sys/endian.h>
+#include <sys/endian.h>
#include <machine/bus.h>
@@ -56,7 +56,7 @@
#define A10_MMC_MEMRES 0
#define A10_MMC_IRQRES 1
#define A10_MMC_RESSZ 2
-#define A10_MMC_NDESC 16
+#define A10_MMC_NDESC 16
#define A10_MMC_DMA_FTRGLEVEL_A20 0x20070008
struct a10_mmc_softc {
@@ -73,22 +73,22 @@
struct mtx a10_mtx;
struct resource * a10_res[A10_MMC_RESSZ];
uint32_t a10_intr;
- uint32_t a10_idst ;
+ uint32_t a10_idst ;
uint32_t a10_intr_wait;
void * a10_intrhand;
- int a10_use_dma ;
+ int a10_use_dma ;
+
+ /* Fields required for DMA access */
+ uint32_t a10_dma_xfer_len ;
+ bus_dma_segment_t* a10_dma_segs ;
+ int a10_dma_nsegs ;
+ bus_size_t a10_dma_size ;
+ struct a10_mmc_cb a10_dma_cb_arg ;
+ bus_dmamap_t a10_dma_map ;
+ bus_dma_tag_t a10_dma_tag ;
+ int a10_dma_ndesc;
+ void* a10_dma_desc ;
- /* Fields required for DMA access */
- uint32_t a10_dma_xfer_len ;
- bus_dma_segment_t* a10_dma_segs ;
- int a10_dma_nsegs ;
- bus_size_t a10_dma_size ;
- struct a10_mmc_cb a10_dma_cb_arg ;
- bus_dmamap_t a10_dma_map ;
- bus_dma_tag_t a10_dma_tag ;
- int a10_dma_ndesc;
- void* a10_dma_desc ;
-
};
static struct resource_spec a10_mmc_res_spec[] = {
@@ -99,14 +99,14 @@
static int a10_mmc_probe(device_t);
static int a10_mmc_attach(device_t);
-static int a10_mmc_setup_dma(struct a10_mmc_softc*, device_t) ;
-static int a10_mmc_prepare_dma(struct a10_mmc_softc*) ;
+static int a10_mmc_setup_dma(struct a10_mmc_softc*, device_t) ;
+static int a10_mmc_prepare_dma(struct a10_mmc_softc*) ;
static int a10_mmc_detach(device_t);
static int a10_mmc_reset(struct a10_mmc_softc *);
static void a10_mmc_intr(void *);
static int a10_mmc_update_clock(struct a10_mmc_softc *);
-static void a10_dma_cb(void*, bus_dma_segment_t*, int, int) ;
+static void a10_dma_cb(void*, bus_dma_segment_t*, int, int) ;
static int a10_mmc_update_ios(device_t, device_t);
static int a10_mmc_request(device_t, device_t, struct mmc_request *);
static int a10_mmc_get_ro(device_t, device_t);
@@ -142,7 +142,7 @@
struct sysctl_oid_list *tree;
sc = device_get_softc(dev);
- sc->a10_use_dma = 1 ;
+ sc->a10_use_dma = 1 ;
sc->a10_dev = dev;
sc->a10_req = NULL;
sc->a10_id = device_get_unit(dev);
@@ -207,12 +207,12 @@
if(sc->a10_use_dma == 1) {
if(a10_mmc_setup_dma(sc,dev) != 0) {
- device_printf(sc->a10_dev, "Couldn't setup DMA!\n") ;
- sc->a10_use_dma = 0 ;
+ device_printf(sc->a10_dev, "Couldn't setup DMA!\n") ;
+ sc->a10_use_dma = 0 ;
}
}
- //sc->a10_use_dma = 0 ; /* Remove this after testing */
- device_printf(sc->a10_dev, "Setting up dma finished %d\n", sc->a10_use_dma) ;
+ //sc->a10_use_dma = 0 ; /* Remove this after testing */
+ device_printf(sc->a10_dev, "Setting up dma finished %d\n", sc->a10_use_dma) ;
return (0);
fail:
@@ -224,132 +224,132 @@
return (ENXIO);
}
-/*TODO :- Add the dismantling DMA part also with goto statements */
-static int
+/*TODO :- Add the dismantling DMA part also with goto statements */
+static int
a10_mmc_setup_dma(struct a10_mmc_softc* sc, device_t dev)
{
- sc->a10_dma_xfer_len = 0x2000 ;
- sc->a10_dma_ndesc = A10_MMC_NDESC ;
- sc->a10_dma_size = sizeof(struct a10_mmc_dma_desc)*(sc->a10_dma_ndesc) ;
+ sc->a10_dma_xfer_len = 0x2000 ;
+ sc->a10_dma_ndesc = A10_MMC_NDESC ;
+ sc->a10_dma_size = sizeof(struct a10_mmc_dma_desc)*(sc->a10_dma_ndesc) ;
- uint32_t error ;
- /* First create the tag */
+ uint32_t error ;
+ /* First create the tag */
error = bus_dma_tag_create(bus_get_dma_tag(dev),1,
sc->a10_dma_size,BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
NULL,NULL,sc->a10_dma_size,
1,sc->a10_dma_size,0,
- NULL,NULL,&sc->a10_dma_tag) ;
+ NULL,NULL,&sc->a10_dma_tag) ;
if(error)
- return (error) ;
+ return (error) ;
- /* Allocate the memory and map at kva sc->a10_dma_desc*/
+ /* Allocate the memory and map at kva sc->a10_dma_desc*/
- error = bus_dmamem_alloc(sc->a10_dma_tag,&sc->a10_dma_desc,BUS_DMA_WAITOK,&sc->a10_dma_map) ;
+ error = bus_dmamem_alloc(sc->a10_dma_tag,&sc->a10_dma_desc,BUS_DMA_WAITOK,&sc->a10_dma_map) ;
if(error)
- return (error) ;
+ return (error) ;
- /* Load the map */
- error = bus_dmamap_load(sc->a10_dma_tag, sc->a10_dma_map,sc->a10_dma_desc,sc->a10_dma_size,a10_dma_cb, &sc->a10_dma_cb_arg,0) ;
+ /* Load the map */
+ error = bus_dmamap_load(sc->a10_dma_tag, sc->a10_dma_map,sc->a10_dma_desc,sc->a10_dma_size,a10_dma_cb, &sc->a10_dma_cb_arg,0) ;
if((error != 0)&&(error != EINPROGRESS))
- return (error) ;
-
- return(0) ;
+ return (error) ;
+
+ return(0) ;
}
static int
a10_mmc_prepare_dma(struct a10_mmc_softc* sc)
{
- struct a10_mmc_dma_desc* dma = sc->a10_dma_desc ;
- struct mmc_command* cmd = sc->a10_req->cmd ;
- int read = (sc->a10_req->cmd->data->flags & MMC_DATA_WRITE) ? 0 : 1 ;
- bus_addr_t desc_paddr = (sc->a10_dma_cb_arg).addr ;
- bus_size_t off = 0 ;
- int desc, rem,seg ;
- uint32_t val;
+ struct a10_mmc_dma_desc* dma = sc->a10_dma_desc ;
+ struct mmc_command* cmd = sc->a10_req->cmd ;
+ int read = (sc->a10_req->cmd->data->flags & MMC_DATA_WRITE) ? 0 : 1 ;
+ bus_addr_t desc_paddr = (sc->a10_dma_cb_arg).addr ;
+ bus_size_t off = 0 ;
+ int desc, rem,seg ;
+ uint32_t val;
- desc = 0 ;
+ desc = 0 ;
- /* Pick a segment and program all the descriptors in the segment. */
+ /* Pick a segment and program all the descriptors in the segment. */
for(seg = 0; seg < sc->a10_dma_cb_arg.nsegs ; seg++)
{
- bus_addr_t paddr = (sc->a10_dma_cb_arg).segs[seg].ds_addr;
- bus_size_t len = (sc->a10_dma_cb_arg).segs[seg].ds_len ;
- rem = min(len,cmd->data->len) ;
+ bus_addr_t paddr = (sc->a10_dma_cb_arg).segs[seg].ds_addr;
+ bus_size_t len = (sc->a10_dma_cb_arg).segs[seg].ds_len ;
+ rem = min(len,cmd->data->len) ;
while(rem > 0)
{
if(desc == sc->a10_dma_ndesc)
- break ;
- len = min(sc->a10_dma_xfer_len, rem) ;
- dma[desc].buff_size = htole32(len) ;
- dma[desc].buff_addr = htole32(paddr + off) ;
- dma[desc].config = htole32(A10_MMC_DMA_CONFIG_CH|A10_MMC_DMA_CONFIG_OWN) ;
-
- cmd->data->len -= len ;
- rem -= len ;
- off += len ;
+ break ;
+ len = min(sc->a10_dma_xfer_len, rem) ;
+ dma[desc].buff_size = htole32(len) ;
+ dma[desc].buff_addr = htole32(paddr + off) ;
+ dma[desc].config = htole32(A10_MMC_DMA_CONFIG_CH|A10_MMC_DMA_CONFIG_OWN) ;
+
+ cmd->data->len -= len ;
+ rem -= len ;
+ off += len ;
if(desc == 0) {
- dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_FD) ;
+ dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_FD) ;
}
if(cmd->data->len == 0) {
- dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_LD) ;
- dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_ER) ;
- dma[desc].next = 0 ;
+ dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_LD) ;
+ dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_ER) ;
+ dma[desc].next = 0 ;
}
- else {
- dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_DIC) ;
- dma[desc].next = htole32(desc_paddr + ((desc+1)*sizeof(struct a10_mmc_dma_desc))) ;
+ else {
+ dma[desc].config |= htole32(A10_MMC_DMA_CONFIG_DIC) ;
+ dma[desc].next = htole32(desc_paddr + ((desc+1)*sizeof(struct a10_mmc_dma_desc))) ;
}
- desc++ ;
+ desc++ ;
}
}
if(desc == sc->a10_dma_ndesc) {
- device_printf(sc->a10_dev, "Couldn't find enough descriptors for DMA transfer! desc = %d,sc->a10_dma_ndesc = %d\n",desc, sc->a10_dma_ndesc) ;
+ device_printf(sc->a10_dev, "Couldn't find enough descriptors for DMA transfer! desc = %d,sc->a10_dma_ndesc = %d\n",desc, sc->a10_dma_ndesc) ;
return EIO ;
}
-
- bus_dmamap_sync(sc->a10_dma_tag, sc->a10_dma_map, BUS_DMASYNC_PREWRITE) ;
- val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) ;
- val |= A10_MMC_DMA_ENABLE ;
- val |= A10_MMC_INT_ENABLE ;
- A10_MMC_WRITE_4(sc, A10_MMC_GCTRL,val) ;
- val |= A10_MMC_DMA_RESET ;
- A10_MMC_WRITE_4(sc, A10_MMC_GCTRL,val) ;
- A10_MMC_WRITE_4(sc, A10_MMC_DMAC,A10_MMC_IDMAC_SOFT_RST) ;
- A10_MMC_WRITE_4(sc, A10_MMC_DMAC,A10_MMC_IDMAC_IDMA_ON | A10_MMC_IDMAC_FIX_BURST) ;
- val = A10_MMC_READ_4(sc,A10_MMC_IDIE) ;
+ bus_dmamap_sync(sc->a10_dma_tag, sc->a10_dma_map, BUS_DMASYNC_PREWRITE) ;
+
+ val = A10_MMC_READ_4(sc, A10_MMC_GCTRL) ;
+ val |= A10_MMC_DMA_ENABLE ;
+ val |= A10_MMC_INT_ENABLE ;
+ A10_MMC_WRITE_4(sc, A10_MMC_GCTRL,val) ;
+ val |= A10_MMC_DMA_RESET ;
+ A10_MMC_WRITE_4(sc, A10_MMC_GCTRL,val) ;
+ A10_MMC_WRITE_4(sc, A10_MMC_DMAC,A10_MMC_IDMAC_SOFT_RST) ;
+ A10_MMC_WRITE_4(sc, A10_MMC_DMAC,A10_MMC_IDMAC_IDMA_ON | A10_MMC_IDMAC_FIX_BURST) ;
+ val = A10_MMC_READ_4(sc,A10_MMC_IDIE) ;
val &= ~(A10_MMC_IDMAC_RECEIVE_INT | A10_MMC_IDMAC_TRANSMIT_INT) ;
if(read == 1) {
- val |= A10_MMC_IDMAC_RECEIVE_INT ;
- }
- else {
- val |= A10_MMC_IDMAC_TRANSMIT_INT ;
- }
-
- A10_MMC_WRITE_4(sc, A10_MMC_IDIE,val) ;
- A10_MMC_WRITE_4(sc, A10_MMC_DLBA,desc_paddr) ;
- A10_MMC_WRITE_4(sc, A10_MMC_FTRGL,A10_MMC_DMA_FTRGLEVEL_A20) ;
-
- return (0) ;
-}
+ val |= A10_MMC_IDMAC_RECEIVE_INT ;
+ }
+ else {
+ val |= A10_MMC_IDMAC_TRANSMIT_INT ;
+ }
+
+ A10_MMC_WRITE_4(sc, A10_MMC_IDIE,val) ;
+ A10_MMC_WRITE_4(sc, A10_MMC_DLBA,desc_paddr) ;
+ A10_MMC_WRITE_4(sc, A10_MMC_FTRGL,A10_MMC_DMA_FTRGLEVEL_A20) ;
+
+ return (0) ;
+}
static void
-a10_dma_cb(void* arg, bus_dma_segment_t* segs, int nsegs, int error)
+a10_dma_cb(void* arg, bus_dma_segment_t* segs, int nsegs, int error)
{
- if(error) {
- printf("a10_mmc: Error in a10_dma_callback function, code = %d\n",error) ;
- return ;
- }
-
- (*(struct a10_mmc_cb*)arg).nsegs = nsegs ;
- (*(struct a10_mmc_cb*)arg).addr = segs[0].ds_addr ;
- (*(struct a10_mmc_cb*)arg).segs = segs;
+ if(error) {
+ printf("a10_mmc: Error in a10_dma_callback function, code = %d\n",error) ;
+ return ;
+ }
+
+ (*(struct a10_mmc_cb*)arg).nsegs = nsegs ;
+ (*(struct a10_mmc_cb*)arg).addr = segs[0].ds_addr ;
+ (*(struct a10_mmc_cb*)arg).segs = segs;
}
static int
@@ -414,7 +414,7 @@
sc->a10_req = NULL;
sc->a10_intr = 0;
sc->a10_resid = 0;
- sc->a10_idst = 0 ;
+ sc->a10_idst = 0 ;
sc->a10_intr_wait = 0;
req->done(req);
}
@@ -454,7 +454,7 @@
a10_mmc_req_done(sc);
}
-static void
+static void
a10_mmc_timeout(void *arg)
{
struct a10_mmc_softc *sc;
@@ -502,7 +502,7 @@
A10_MMC_LOCK(sc);
rint = A10_MMC_READ_4(sc, A10_MMC_RINTR);
imask = A10_MMC_READ_4(sc, A10_MMC_IMASK);
- idst = A10_MMC_READ_4(sc, A10_MMC_IDST) ;
+ idst = A10_MMC_READ_4(sc, A10_MMC_IDST) ;
if (imask == 0 && rint == 0 ) {
A10_MMC_UNLOCK(sc);
return;
@@ -531,40 +531,40 @@
return;
}
- /* Do we have to return from here or continue afterwards ? */
- /* What is the DMA only, what is PIO only and what is common part ? */
+ /* Do we have to return from here or continue afterwards ? */
+ /* What is the DMA only, what is PIO only and what is common part ? */
if(sc->a10_use_dma == 1) {
- uint32_t comp = 0 ;
- device_printf(sc->a10_dev, "IDST = %d\n", idst) ;
- sc->a10_idst = idst ;
- if(idst & A10_MMC_IDMAC_ERROR) {
- device_printf(sc->a10_dev, "I/O error with DMA\n") ;
- sc->a10_req->cmd->error = EIO ;
+ uint32_t comp = 0 ;
+ device_printf(sc->a10_dev, "IDST = %d\n", idst) ;
+ sc->a10_idst = idst ;
+ if(idst & A10_MMC_IDMAC_ERROR) {
+ device_printf(sc->a10_dev, "I/O error with DMA\n") ;
+ sc->a10_req->cmd->error = EIO ;
}
- if(!(idst & A10_MMC_IDMAC_COMPLETE)) {
- device_printf(sc->a10_dev, "Timeout error with DMA\n") ;
+ if(!(idst & A10_MMC_IDMAC_COMPLETE)) {
+ device_printf(sc->a10_dev, "Timeout error with DMA\n") ;
sc->a10_req->cmd->error = ETIMEDOUT ;
}
else
- comp = 1 ;
+ comp = 1 ;
- if(sc->a10_req->cmd->data != NULL) {
- data = sc->a10_req->cmd->data ;
+ if(sc->a10_req->cmd->data != NULL) {
+ data = sc->a10_req->cmd->data ;
if(data->flags&MMC_DATA_WRITE)
- bus_dmamap_sync(sc->a10_dma_tag,sc->a10_dma_map,BUS_DMASYNC_POSTWRITE) ;
+ bus_dmamap_sync(sc->a10_dma_tag,sc->a10_dma_map,BUS_DMASYNC_POSTWRITE) ;
else
- bus_dmamap_sync(sc->a10_dma_tag,sc->a10_dma_map, BUS_DMASYNC_POSTREAD) ;
+ bus_dmamap_sync(sc->a10_dma_tag,sc->a10_dma_map, BUS_DMASYNC_POSTREAD) ;
}
if(comp == 0)
- a10_mmc_req_done(sc) ;
+ a10_mmc_req_done(sc) ;
else {
- device_printf(sc->a10_dev, "DMA transfer working!\n") ;
- a10_mmc_req_ok(sc) ;
+ device_printf(sc->a10_dev, "DMA transfer working!\n") ;
+ a10_mmc_req_ok(sc) ;
}
}
- A10_MMC_WRITE_4(sc, A10_MMC_IDST, idst) ;
+ A10_MMC_WRITE_4(sc, A10_MMC_IDST, idst) ;
sc->a10_intr |= rint;
if(sc->a10_use_dma == 0) {
@@ -595,7 +595,7 @@
return (EBUSY);
}
sc->a10_req = req;
- device_printf(sc->a10_dev, "a10_req = %p\n", sc->a10_req) ;
+ device_printf(sc->a10_dev, "a10_req = %p\n", sc->a10_req) ;
cmd = req->cmd;
cmdreg = A10_MMC_START;
if (cmd->opcode == MMC_GO_IDLE_STATE)
@@ -609,7 +609,7 @@
sc->a10_intr = 0;
sc->a10_resid = 0;
- sc->a10_idst = 0 ;
+ sc->a10_idst = 0 ;
sc->a10_intr_wait = A10_MMC_CMD_DONE;
cmd->error = MMC_ERR_NONE;
if (cmd->data != NULL) {
@@ -628,7 +628,7 @@
A10_MMC_WRITE_4(sc, A10_MMC_CARG, cmd->arg);
- if(cmd->data != NULL ) {
+ if(cmd->data != NULL ) {
if(sc->a10_use_dma == 1) {
a10_mmc_prepare_dma(sc) ;
}
@@ -643,7 +643,7 @@
}
static int
-a10_mmc_read_ivar(device_t bus, device_t child, int which,
+a10_mmc_read_ivar(device_t bus, device_t child, int which,
uintptr_t *result)
{
struct a10_mmc_softc *sc;
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