socsvn commit: r288800 - soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm

[mihai at FreeBSD.org]

Author: mihai
Date: Mon Jul 27 07:20:19 2015
New Revision: 288800
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=288800

Log:
  soc2015: mihai: bhyve-arm: sys: arm: vmm: hyp_helpers.h: fix restoring SCTRL register [trashing r2 which retain the SCTRL]

Modified:
  soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/hyp_helpers.h

Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/hyp_helpers.h
==============================================================================
--- soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/hyp_helpers.h	Mon Jul 27 07:16:51 2015	(r288799)
+++ soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/hyp_helpers.h	Mon Jul 27 07:20:19 2015	(r288800)
@@ -156,8 +156,8 @@
 
 #define	load_cp15_regs_batch3					\
 	mrc	p15, 0, r2, c14, c1, 0;		/* CNTKCTL */	\
-	mrrc	p15, 0, r3, r4, c7;		/* PAR */	\
-	mrc	p15, 0, r5, c10, c3, 0;		/* AMAIR0 */	\
+	mrrc	p15, 0, r4, r5, c7;		/* PAR */	\
+	mrc	p15, 0, r3, c10, c3, 0;		/* AMAIR0 */	\
 	mrc	p15, 0, r6, c10, c3, 1		/* AMAIR1 */
 
 #define	store_cp15_regs_batch1					\
@@ -186,8 +186,8 @@
 
 #define	store_cp15_regs_batch3					\
 	mcr	p15, 0, r2, c14, c1, 0;		/* CNTKCTL */	\
-	mcrr	p15, 0, r3, r4, c7;		/* PAR */	\
-	mcr	p15, 0, r5, c10, c3, 0;		/* AMAIR0 */	\
+	mcrr	p15, 0, r4, r5, c7;		/* PAR */	\
+	mcr	p15, 0, r3, c10, c3, 0;		/* AMAIR0 */	\
 	mcr	p15, 0, r6, c10, c3, 1		/* AMAIR1 */
 
 #define	store_guest_cp15_regs_batch1				\
@@ -228,10 +228,10 @@
 	ldr	r3, [r0, #HYPCTX_CP15_CPACR];			\
 	ldr	r4, [r0, #HYPCTX_CP15_TTBCR];			\
 	ldr	r5, [r0, #HYPCTX_CP15_DACR];			\
-	add	r2, r0, #HYPCTX_CP15_TTBR0;			\
-	ldrd	r6, r7, [r2];					\
-	add	r2, r0, #HYPCTX_CP15_TTBR1;			\
-	ldrd	r8, r9, [r2];					\
+	add	r10, r0, #HYPCTX_CP15_TTBR0;			\
+	ldrd	r6, r7, [r10];					\
+	add	r10, r0, #HYPCTX_CP15_TTBR1;			\
+	ldrd	r8, r9, [r10];					\
 	ldr	r10, [r0, #HYPCTX_CP15_PRRR];			\
 	ldr	r11, [r0, #HYPCTX_CP15_NMRR];			\
 	ldr	r12, [r0, #HYPCTX_CP15_CSSELR]
@@ -251,8 +251,8 @@
 
 #define	load_guest_cp15_regs_batch3				\
 	ldr	r2, [r0, #HYPCTX_CP15_CNTKCTL];			\
-	add	r2, r0, #HYPCTX_CP15_PAR;			\
-	ldrd	r4, r5, [r2];					\
+	add	r3, r0, #HYPCTX_CP15_PAR;			\
+	ldrd	r4, r5, [r3];					\
 	ldr	r3, [r0, #HYPCTX_CP15_AMAIR0];			\
 	ldr	r6, [r0, #HYPCTX_CP15_AMAIR1]