socsvn commit: r290376 - soc2015/mihai/bhyve-on-arm-head/sys/arm/arm

mihai at FreeBSD.org mihai at FreeBSD.org
Mon Aug 31 08:05:39 UTC 2015


Author: mihai
Date: Mon Aug 31 08:05:38 2015
New Revision: 290376
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=290376

Log:
  sys: arm: arm: gic.c: active-high-level and rising-edge only is for SPI only

Modified:
  soc2015/mihai/bhyve-on-arm-head/sys/arm/arm/gic.c

Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/arm/gic.c
==============================================================================
--- soc2015/mihai/bhyve-on-arm-head/sys/arm/arm/gic.c	Mon Aug 31 08:04:15 2015	(r290375)
+++ soc2015/mihai/bhyve-on-arm-head/sys/arm/arm/gic.c	Mon Aug 31 08:05:38 2015	(r290376)
@@ -62,6 +62,7 @@
 #ifdef	VMM_ARM_VGIC
 	{ SYS_RES_MEMORY,	2,	RF_ACTIVE },	/* Virtual Interface Control */
 	{ SYS_RES_MEMORY,	3,	RF_ACTIVE },	/* Virtual CPU interface */
+//	{ SYS_RES_IRQ,		4,	RF_ACTIVE },	/* vGIC maintenance interrupt */
 #endif
 	{ -1, 0 }
 };
@@ -152,10 +153,6 @@
 		*trig = INTR_TRIGGER_CONFORM;
 		*pol = INTR_POLARITY_CONFORM;
 	} else {
-		if (fdt32_to_cpu(intr[0]) == 0)
-			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
-		else
-			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
 		/*
 		 * In intr[2], bits[3:0] are trigger type and level flags.
 		 *   1 = low-to-high edge triggered
@@ -164,13 +161,19 @@
 		 *   8 = active low level-sensitive
 		 * The hardware only supports active-high-level or rising-edge.
 		 */
-		if (fdt32_to_cpu(intr[2]) & 0x0a) {
-			printf("unsupported trigger/polarity configuration "
-			    "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
-			return (ENOTSUP);
+		if (fdt32_to_cpu(intr[0]) == 0) {
+			if (fdt32_to_cpu(intr[2]) & 0x0a) {
+				printf("unsupported trigger/polarity configuration "
+				    "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
+				return (ENOTSUP);
+			}
+			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
+		} else {
+			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
 		}
+		
 		*pol  = INTR_POLARITY_CONFORM;
-		if (fdt32_to_cpu(intr[2]) & 0x01)
+		if (fdt32_to_cpu(intr[2]) & 0x03)
 			*trig = INTR_TRIGGER_EDGE;
 		else
 			*trig = INTR_TRIGGER_LEVEL;


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