socsvn commit: r254914 - soc2013/zcore/head/usr.sbin/bhyve

[zcore at FreeBSD.org]

Author: zcore
Date: Thu Jul 18 12:48:13 2013
New Revision: 254914
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=254914

Log:
  group register i/o and add better dbg support

Modified:
  soc2013/zcore/head/usr.sbin/bhyve/pci_ahci.c

Modified: soc2013/zcore/head/usr.sbin/bhyve/pci_ahci.c
==============================================================================
--- soc2013/zcore/head/usr.sbin/bhyve/pci_ahci.c	Thu Jul 18 11:06:39 2013	(r254913)
+++ soc2013/zcore/head/usr.sbin/bhyve/pci_ahci.c	Thu Jul 18 12:48:13 2013	(r254914)
@@ -55,8 +55,9 @@
 /*
  * Debug printf
  */
-static int pci_ahci_debug;
-#define DPRINTF(params) if (pci_ahci_debug) printf params
+static FILE *dbg;
+#define dprintf(format, arg...)	do{fprintf(dbg, format, ##arg);fflush(dbg);}while(0)
+#define DPRINTF(params) dprintf params
 #define WPRINTF(params) printf params
 
 /*
@@ -119,6 +120,9 @@
 		return (1);
 	}
 
+	dbg = fopen("/tmp/log", "w+");
+	DPRINTF(("pci_ahci initializing\n"));
+
 	/*
 	 * Attempt to open the backing image. Use the PCI slot/func
 	 * for the identifier string since that uniquely identifies
@@ -231,20 +235,21 @@
 
 	switch (offset) {
 	case AHCI_CAP:
-		value = sc->cap;
-		break;
 	case AHCI_GHC:
-		value = sc->ghc;
 	case AHCI_IS:
-		value = sc->is;
 	case AHCI_PI:
-		value = sc->pi;
 	case AHCI_VS:
-		value = sc->vs;
-		break;
+	case AHCI_CCCC:
+	case AHCI_CCCP:
+	case AHCI_EM_LOC:
+	case AHCI_EM_CTL:
 	case AHCI_CAP2:
-		value = sc->cap2;
+	{
+		uint32_t *p = &sc->cap;
+		p += (offset - AHCI_CAP) / sizeof(uint32_t);
+		value = *p;
 		break;
+	}
 	default:
 		DPRINTF(("pci_ahci_host: unknown i/o read offset %ld\n\r", offset));
 		value = 0;
@@ -262,7 +267,27 @@
 
 	switch (offset) {
 	case AHCI_P_CLB:
+	case AHCI_P_CLBU:
+	case AHCI_P_FB:
+	case AHCI_P_FBU:
+	case AHCI_P_IS:
+	case AHCI_P_IE:
+	case AHCI_P_CMD:
+	case AHCI_P_TFD:
+	case AHCI_P_SIG:
+	case AHCI_P_SSTS:
+	case AHCI_P_SCTL:
+	case AHCI_P_SERR:
+	case AHCI_P_SACT:
+	case AHCI_P_CI:
+	case AHCI_P_SNTF:
+	case AHCI_P_FBS:
+	{
+		uint32_t *p= &sc->port[port].clb;
+		p += (offset - AHCI_P_CLB) / sizeof(uint32_t);
+		value = *p;
 		break;
+	}
 	default:
 		DPRINTF(("pci_ahci_port%d: unknown i/o read offset %ld\n\r",
 			port, offset));