socsvn commit: r240348 - in soc2012/aleek/beaglexm-armv6/sys:
arm/conf arm/ti arm/ti/am37x arm/ti/usb boot/fdt/dts
aleek at FreeBSD.org
aleek at FreeBSD.org
Tue Aug 14 13:28:35 UTC 2012
Author: aleek
Date: Tue Aug 14 13:28:32 2012
New Revision: 240348
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=240348
Log:
added usb UHH soft resetting. Ive found this one on u-boot source code
Modified:
soc2012/aleek/beaglexm-armv6/sys/arm/conf/BEAGLEBOARD-XM
soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_scm_padconf.c
soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_gpio.c
soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c
soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_usb.h
soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts
Modified: soc2012/aleek/beaglexm-armv6/sys/arm/conf/BEAGLEBOARD-XM
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/arm/conf/BEAGLEBOARD-XM Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/arm/conf/BEAGLEBOARD-XM Tue Aug 14 13:28:32 2012 (r240348)
@@ -113,7 +113,7 @@
device ehci
device umass
device scbus # SCSI bus (required for SCSI)
-#device da # Direct Access (disks)
+device da # Direct Access (disks)
# Ethernet
device loop
Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_scm_padconf.c
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_scm_padconf.c Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_scm_padconf.c Tue Aug 14 13:28:32 2012 (r240348)
@@ -43,10 +43,62 @@
#include <machine/frame.h>
#include <machine/resource.h>
#include <machine/intr.h>
+#include <sys/gpio.h>
#include <arm/ti/tivar.h>
#include <arm/ti/ti_scm.h>
+#define CONTROL_PADCONF_WAKEUP_EVENT (1UL << 15)
+#define CONTROL_PADCONF_WAKEUP_ENABLE (1UL << 14)
+#define CONTROL_PADCONF_OFF_PULL_UP (1UL << 13)
+#define CONTROL_PADCONF_OFF_PULL_ENABLE (1UL << 12)
+#define CONTROL_PADCONF_OFF_OUT_HIGH (1UL << 11)
+#define CONTROL_PADCONF_OFF_OUT_ENABLE (1UL << 10)
+#define CONTROL_PADCONF_OFF_ENABLE (1UL << 9)
+#define CONTROL_PADCONF_INPUT_ENABLE (1UL << 8)
+#define CONTROL_PADCONF_PULL_UP (1UL << 4)
+#define CONTROL_PADCONF_PULL_ENABLE (1UL << 3)
+#define CONTROL_PADCONF_MUXMODE_MASK (0x7)
+
+#define CONTROL_PADCONF_SATE_MASK ( CONTROL_PADCONF_WAKEUP_EVENT \
+ | CONTROL_PADCONF_WAKEUP_ENABLE \
+ | CONTROL_PADCONF_OFF_PULL_UP \
+ | CONTROL_PADCONF_OFF_PULL_ENABLE \
+ | CONTROL_PADCONF_OFF_OUT_HIGH \
+ | CONTROL_PADCONF_OFF_OUT_ENABLE \
+ | CONTROL_PADCONF_OFF_ENABLE \
+ | CONTROL_PADCONF_INPUT_ENABLE \
+ | CONTROL_PADCONF_PULL_UP \
+ | CONTROL_PADCONF_PULL_ENABLE )
+
+
+
+
+
+/* Active pin states */
+#define PADCONF_PIN_OUTPUT 0
+#define PADCONF_PIN_INPUT CONTROL_PADCONF_INPUT_ENABLE
+#define PADCONF_PIN_INPUT_PULLUP ( CONTROL_PADCONF_INPUT_ENABLE \
+ | CONTROL_PADCONF_PULL_ENABLE \
+ | CONTROL_PADCONF_PULL_UP)
+#define PADCONF_PIN_INPUT_PULLDOWN ( CONTROL_PADCONF_INPUT_ENABLE \
+ | CONTROL_PADCONF_PULL_ENABLE )
+
+/* Off mode states */
+#define PADCONF_PIN_OFF_NONE 0
+#define PADCONF_PIN_OFF_OUTPUT_HIGH ( CONTROL_PADCONF_OFF_ENABLE \
+ | CONTROL_PADCONF_OFF_OUT_ENABLE \
+ | CONTROL_PADCONF_OFF_OUT_HIGH)
+#define PADCONF_PIN_OFF_OUTPUT_LOW ( CONTROL_PADCONF_OFF_ENABLE \
+ | CONTROL_PADCONF_OFF_OUT_ENABLE)
+#define PADCONF_PIN_OFF_INPUT_PULLUP ( CONTROL_PADCONF_OFF_ENABLE \
+ | CONTROL_PADCONF_OFF_PULL_ENABLE \
+ | CONTROL_PADCONF_OFF_PULL_UP)
+#define PADCONF_PIN_OFF_INPUT_PULLDOWN ( CONTROL_PADCONF_OFF_ENABLE \
+ | CONTROL_PADCONF_OFF_PULL_ENABLE)
+#define PADCONF_PIN_OFF_WAKEUPENABLE CONTROL_PADCONF_WAKEUP_ENABLE
+
+
#define _PIN(r, b, gp, gm, m0, m1, m2, m3, m4, m5, m6, m7) \
{ .reg_off = r, \
.gpio_pin = gp, \
@@ -289,8 +341,8 @@
};
const struct ti_scm_device ti_scm_dev = {
- .padconf_muxmode_mask = 0x7,
- .padconf_sate_mask = 0x78,
+ .padconf_muxmode_mask = CONTROL_PADCONF_MUXMODE_MASK,
+ .padconf_sate_mask = CONTROL_PADCONF_SATE_MASK,
.padstate = (struct ti_scm_padstate *) &ti_padstate_devmap,
.padconf = (struct ti_scm_padconf *) &ti_padconf_devmap,
};
@@ -298,8 +350,19 @@
int
ti_scm_padconf_set_gpioflags(uint32_t gpio, uint32_t flags)
{
- /* TODO */
- return (EINVAL);
+ unsigned int state = 0;
+
+ if (flags & GPIO_PIN_OUTPUT)
+ state = PADCONF_PIN_OUTPUT;
+ else if (flags & GPIO_PIN_INPUT) {
+ if (flags & GPIO_PIN_PULLUP)
+ state = PADCONF_PIN_INPUT_PULLUP;
+ else if (flags & GPIO_PIN_PULLDOWN)
+ state = PADCONF_PIN_INPUT_PULLDOWN;
+ else
+ state = PADCONF_PIN_INPUT;
+ }
+ return ti_scm_padconf_set_gpiomode(gpio, state);
}
void
Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_gpio.c
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_gpio.c Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_gpio.c Tue Aug 14 13:28:32 2012 (r240348)
@@ -437,6 +437,8 @@
uint32_t mask = (1UL << (pin % PINS_PER_BANK));
uint32_t reg_val;
+ device_printf( sc->sc_dev, "%s:%d\n", __func__, __LINE__ );
+
/* Sanity check the flags supplied are valid, i.e. not input and output */
if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == 0x0000)
return (EINVAL);
@@ -458,10 +460,12 @@
/* Set the GPIO mode and state */
if (ti_scm_padconf_set_gpioflags(pin, flags) != 0) {
+ device_printf( sc->sc_dev, "%s:%d\n", __func__, __LINE__ );
TI_GPIO_UNLOCK(sc);
return (EINVAL);
}
+ device_printf( sc->sc_dev, "%s:%d\n", __func__, __LINE__ );
/* If configuring as an output set the "output enable" bit */
reg_val = ti_gpio_read_4(sc, bank, TI_GPIO_OE);
if (flags & GPIO_PIN_INPUT)
@@ -470,6 +474,7 @@
reg_val &= ~mask;
ti_gpio_write_4(sc, bank, TI_GPIO_OE, reg_val);
+ device_printf( sc->sc_dev, "%s:%d\n", __func__, __LINE__ );
TI_GPIO_UNLOCK(sc);
@@ -808,3 +813,5 @@
static devclass_t ti_gpio_devclass;
DRIVER_MODULE(ti_gpio, simplebus, ti_gpio_driver, ti_gpio_devclass, 0, 0);
+MODULE_DEPEND(ti_gpio, ti_scm, 1, 1, 1);
+
Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c Tue Aug 14 13:28:32 2012 (r240348)
@@ -102,9 +102,6 @@
#include <arm/ti/ti_prcm.h>
#include <arm/ti/ti_scm.h>
-#include <arm/ti/twl/twl.h>
-#include <arm/ti/twl/twl_vreg.h>
-
#include <arm/ti/usb/omap_usb.h>
#include "gpio_if.h"
@@ -114,7 +111,6 @@
device_t sc_dev;
device_t sc_gpio_dev;
- device_t sc_vreg_dev;
/* TLL register set */
struct resource* tll_mem_res;
@@ -350,53 +346,30 @@
uint32_t reg = 0;
int reset_performed = 0;
int i;
-// int gpio_val;
device_printf(isc->sc_dev, "Starting TI EHCI USB Controller\n");
/* Enable Clocks for high speed USBHOST */
- if( ti_prcm_clk_enable(USBHSHOST_CLK) != 0 )
- {
- device_printf( isc->sc_dev, "KURWAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA" );
- }
-
- /* enabling TWL4030/TPS95950 voltage regulator */
- //twl_vreg_set_voltage(isc->sc_vreg_dev, "vusb1v5", 1500);
- //twl_vreg_set_voltage(isc->sc_vreg_dev, "vusb1v8", 1800);
- //twl_vreg_set_voltage(isc->sc_vreg_dev, "vusb3v1", 3100);
+ ti_prcm_clk_enable(USBHSHOST_CLK);
/* Hold the PHY in reset while configuring */
- /*
for (int i = 0; i < 3; i++) {
if (isc->phy_reset[i]) {
- // Configure the GPIO to drive low (hold in reset)
+ /* Configure the GPIO to drive low (hold in reset) */
if ((isc->reset_gpio_pin[i] != -1) && (isc->sc_gpio_dev != NULL)) {
GPIO_PIN_SETFLAGS(isc->sc_gpio_dev, isc->reset_gpio_pin[i],
GPIO_PIN_OUTPUT);
- if( GPIO_PIN_SET(isc->sc_gpio_dev, isc->reset_gpio_pin[i],
- GPIO_PIN_LOW) != 0 )
- {
- return ENXIO;
- }
- if( GPIO_PIN_SET(isc->sc_gpio_dev, 56,
- GPIO_PIN_LOW) != 0 )
- {
- return ENXIO;
- }
- GPIO_PIN_GET( isc->sc_gpio_dev, isc->reset_gpio_pin[i], &gpio_val );
- if( gpio_val != GPIO_PIN_LOW )
- {
- return ENXIO;
- }
+ GPIO_PIN_SET(isc->sc_gpio_dev, isc->reset_gpio_pin[i],
+ GPIO_PIN_LOW);
reset_performed = 1;
}
}
}
-*/
+
/* Hold the PHY in RESET for enough time till DIR is high */
- //if (reset_performed)
- DELAY(100);
+ if (reset_performed)
+ DELAY(10);
/* Read the UHH revision */
isc->ehci_rev = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_REVISION);
@@ -406,12 +379,26 @@
if (isc->ehci_rev == OMAP_EHCI_REV1) {
/* Enable the USB TLL */
- if( ti_prcm_clk_enable(USBTLL_CLK) != 0 )
+ ti_prcm_clk_enable(USBTLL_CLK);
+
+ /* Set the timeout to 100ms*/
+ timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
+ // perform a uhh reset
+ omap_uhh_write_4( isc, OMAP_USBHOST_UHH_SYSCONFIG, UHH_SYSCONFIG_SOFTRESET );
+
+ while( (omap_uhh_read_4( isc, OMAP_USBHOST_UHH_SYSSTATUS ) & 0x2) == 0 )
{
- device_printf( isc->sc_dev, "AKURWAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA" );
+ /* Sleep for a tick */
+ pause("USBRESET", 1);
+
+ if (timeout-- == 0) {
+ device_printf(isc->sc_dev, "UHH reset operation timed out\n");
+ ret = EINVAL;
+ goto err_sys_status;
+ }
}
-
- //omap_ehci_write_4(isc, OMAP_USBHOST_INSNREG04, OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND);
+ device_printf(isc->sc_dev, "UHH RESET DONE\n");
+
/* Perform TLL soft reset, and wait until reset is complete */
omap_tll_write_4(isc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET);
@@ -483,10 +470,12 @@
UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE |
UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY);
} else if (isc->ehci_rev == OMAP_EHCI_REV2) {
+#if 0
reg &= ~UHH_SYSCONFIG_IDLEMODE_MASK;
reg |= UHH_SYSCONFIG_IDLEMODE_NOIDLE;
reg &= ~UHH_SYSCONFIG_STANDBYMODE_MASK;
reg |= UHH_SYSCONFIG_STANDBYMODE_NOSTDBY;
+#endif
}
omap_uhh_write_4(isc, OMAP_USBHOST_UHH_SYSCONFIG, reg);
device_printf(isc->sc_dev, "OMAP_UHH_SYSCONFIG: 0x%08x\n", reg);
@@ -516,6 +505,7 @@
reg |= UHH_HOSTCONFIG_P1_ULPI_BYPASS;
} else if (isc->ehci_rev == OMAP_EHCI_REV2) {
+#if 0
reg |= UHH_HOSTCONFIG_APP_START_CLK;
/* Clear port mode fields for PHY mode*/
@@ -531,6 +521,7 @@
reg |= UHH_HOSTCONFIG_P2_MODE_UTMI_PHY;
else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC)
reg |= UHH_HOSTCONFIG_P2_MODE_HSIC;
+#endif
}
omap_uhh_write_4(isc, OMAP_USBHOST_UHH_HOSTCONFIG, reg);
@@ -545,9 +536,11 @@
* the root-hub is allowed to suspend. Writing 1 to this undocumented
* register bit disables this feature and restores normal behavior."
*/
+
omap_ehci_write_4(isc, OMAP_USBHOST_INSNREG04,
OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND);
+
/* If any of the ports are configured in TLL mode, enable them */
if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
(isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
@@ -564,6 +557,7 @@
omap_ehci_utmi_init(isc, tll_ch_mask);
}
+
/* Release the PHY reset signal now we have configured everything */
if (reset_performed) {
@@ -577,17 +571,10 @@
&& (isc->sc_gpio_dev != NULL)) {
GPIO_PIN_SET(isc->sc_gpio_dev,
isc->reset_gpio_pin[i], GPIO_PIN_HIGH);
- GPIO_PIN_SET(isc->sc_gpio_dev,
- 56, GPIO_PIN_HIGH);
}
}
}
- /* Soft reset the PHY using PHY reset command over ULPI */
- if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
- omap_ehci_soft_phy_reset(isc, 0);
- if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
- omap_ehci_soft_phy_reset(isc, 1);
/* Set the interrupt threshold control, it controls the maximum rate at
* which the host controller issues interrupts. We set it to 1 microframe
* at startup - the default is 8 mircoframes (equates to 1ms).
@@ -597,6 +584,11 @@
reg |= (1 << 16);
omap_ehci_write_4(isc, OMAP_USBHOST_USBCMD, reg);
+ /* Soft reset the PHY using PHY reset command over ULPI */
+ if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
+ omap_ehci_soft_phy_reset(isc, 0);
+ if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
+ omap_ehci_soft_phy_reset(isc, 1);
return(0);
@@ -817,13 +809,13 @@
/* save the device */
isc->sc_dev = dev;
- isc->sc_vreg_dev = devclass_get_device(devclass_find("twl_vreg"), 0);
/* get all DMA memory */
if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
&ehci_iterate_hw_softc)) {
return (ENOMEM);
}
+
/* When the EHCI driver is added to the tree it is expected that 3
* memory resources and 1 interrupt resource is assigned. The memory
* resources should be:
@@ -895,7 +887,6 @@
tuple_size = sizeof(pcell_t) * 3;
node = ofw_bus_get_node(dev);
-
len = OF_getprop(node, "phy-config", phyconf, sizeof(phyconf));
if (len > 0) {
if (len % tuple_size)
@@ -912,7 +903,7 @@
phyconf_ptr += 3;
}
}
-
+
/* Initialise the ECHI registers */
err = omap_ehci_init(isc);
if (err) {
@@ -1055,4 +1046,3 @@
static devclass_t ehci_devclass;
DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
-MODULE_DEPEND(ehci, twl_vreg, 1, 1, 1);
Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_usb.h
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_usb.h Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_usb.h Tue Aug 14 13:28:32 2012 (r240348)
@@ -199,6 +199,7 @@
#define UHH_HOSTCONFIG_P1_ULPI_BYPASS (1UL << 0)
/* The following are on rev2 (OMAP44xx) of the EHCI only */
+#if 0
#define UHH_SYSCONFIG_IDLEMODE_MASK (3UL << 2)
#define UHH_SYSCONFIG_IDLEMODE_NOIDLE (1UL << 2)
#define UHH_SYSCONFIG_STANDBYMODE_MASK (3UL << 4)
@@ -212,6 +213,7 @@
#define UHH_HOSTCONFIG_P2_MODE_ULPI_PHY (0UL << 18)
#define UHH_HOSTCONFIG_P2_MODE_UTMI_PHY (1UL << 18)
#define UHH_HOSTCONFIG_P2_MODE_HSIC (3UL << 18)
+#endif
#define ULPI_FUNC_CTRL_RESET (1 << 5)
Modified: soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts
==============================================================================
--- soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts Tue Aug 14 12:15:01 2012 (r240347)
+++ soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts Tue Aug 14 13:28:32 2012 (r240348)
@@ -94,7 +94,7 @@
"ad25", "gpio_147", "output",
"ae7", "hsusb2_clk", "output",
- "r8", "gpio_56", "output",
+ /*"r8", "gpio_56", "output",/*
/* i2c */
"ic11", "i2c1_scl", "output",
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