svn commit: r548756 - head/cad/verilator

[Yuri Victorovich]

Author: yuri
Date: Wed Sep 16 04:29:35 2020
New Revision: 548756
URL: https://svnweb.freebsd.org/changeset/ports/548756

Log:
  cad/verilator: Add the run-tim dependency on gmake

Modified:
  head/cad/verilator/Makefile
  head/cad/verilator/distinfo

Modified: head/cad/verilator/Makefile
==============================================================================
--- head/cad/verilator/Makefile	Wed Sep 16 01:35:43 2020	(r548755)
+++ head/cad/verilator/Makefile	Wed Sep 16 04:29:35 2020	(r548756)
@@ -2,9 +2,13 @@
 
 PORTNAME=	verilator
 DISTVERSION=	4.100
+PORTREVISION=	1
 CATEGORIES=	cad
 MASTER_SITES=	https://www.veripool.org/ftp/
 
+PATCH_SITES=	https://github.com/${PORTNAME}/${PORTNAME}/commit/
+PATCHFILES=	d750a54e90df1161cfe9502ca56f298005283372.diff:-p1 # make->gmake patch
+
 MAINTAINER=	yuri at FreeBSD.org
 COMMENT=	Synthesizable Verilog to C++ compiler
 
@@ -12,6 +16,7 @@ LICENSE=	GPLv3
 LICENSE_FILE=	${WRKSRC}/LICENSE
 
 LIB_DEPENDS=	libsystemc.so:devel/systemc
+RUN_DEPENDS=	gmake:devel/gmake # verilator runs gmake for the --hierarchical option when the 'gmake' method is chosen
 
 USES=		bison compiler:c++14-lang gmake localbase:ldflags pathfix perl5 python:build,test tar:tgz
 

Modified: head/cad/verilator/distinfo
==============================================================================
--- head/cad/verilator/distinfo	Wed Sep 16 01:35:43 2020	(r548755)
+++ head/cad/verilator/distinfo	Wed Sep 16 04:29:35 2020	(r548756)
@@ -1,3 +1,5 @@
-TIMESTAMP = 1600148259
+TIMESTAMP = 1600224270
 SHA256 (verilator-4.100.tgz) = 22db8132209849bc09f567c48fe1eebea272102aa7b8eb1e39df520cc37ce16d
 SIZE (verilator-4.100.tgz) = 2747140
+SHA256 (d750a54e90df1161cfe9502ca56f298005283372.diff) = 27454dbaa502d0cd2e815416e659062a408a760d48604e18d8401499cebfa1de
+SIZE (d750a54e90df1161cfe9502ca56f298005283372.diff) = 500