svn commit: r471842 - in head/devel: . arachne-pnr
Tobias Kortkamp
tobik at FreeBSD.org
Wed Jun 6 13:47:35 UTC 2018
Author: tobik
Date: Wed Jun 6 13:47:33 2018
New Revision: 471842
URL: https://svnweb.freebsd.org/changeset/ports/471842
Log:
New port: devel/arachne-pnr
Arachne-pnr implements the place and route step of the hardware
compilation process for FPGAs. It currently targets the Lattice
Semiconductor iCE40 family of FPGAs.
WWW: https://github.com/cseed/arachne-pnr
PR: 227590
Submitted by: Johnny Sorocil <jsorocil at gmail.com>
Differential Revision: https://reviews.freebsd.org/D15632
Added:
head/devel/arachne-pnr/
head/devel/arachne-pnr/Makefile (contents, props changed)
head/devel/arachne-pnr/distinfo (contents, props changed)
head/devel/arachne-pnr/pkg-descr (contents, props changed)
head/devel/arachne-pnr/pkg-plist (contents, props changed)
Modified:
head/devel/Makefile
Modified: head/devel/Makefile
==============================================================================
--- head/devel/Makefile Wed Jun 6 13:33:44 2018 (r471841)
+++ head/devel/Makefile Wed Jun 6 13:47:33 2018 (r471842)
@@ -116,6 +116,7 @@
SUBDIR += appstream-glib
SUBDIR += apr1
SUBDIR += apr2
+ SUBDIR += arachne-pnr
SUBDIR += arcanist
SUBDIR += arduino
SUBDIR += arduino-avrdude
Added: head/devel/arachne-pnr/Makefile
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/devel/arachne-pnr/Makefile Wed Jun 6 13:47:33 2018 (r471842)
@@ -0,0 +1,25 @@
+# Created by: Johnny Sorocil <jsorocil at gmail.com>
+# $FreeBSD$
+
+PORTNAME= arachne-pnr
+PORTVERSION= g20180310
+CATEGORIES= devel
+
+MAINTAINER= jsorocil at gmail.com
+COMMENT= Place and route tool for FPGAs
+
+LICENSE= MIT
+LICENSE_FILE= ${WRKSRC}/COPYING
+
+BUILD_DEPENDS= icestorm>=g0:devel/icestorm
+
+USES= gmake
+
+USE_GITHUB= yes
+GH_ACCOUNT= cseed
+GH_TAGNAME= 6701132cbd5c7b31edd0ff18ca6727eb3691186b
+
+post-install:
+ ${STRIP_CMD} ${STAGEDIR}${PREFIX}/bin/arachne-pnr
+
+.include <bsd.port.mk>
Added: head/devel/arachne-pnr/distinfo
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/devel/arachne-pnr/distinfo Wed Jun 6 13:47:33 2018 (r471842)
@@ -0,0 +1,3 @@
+TIMESTAMP = 1527417304
+SHA256 (cseed-arachne-pnr-g20180310-6701132cbd5c7b31edd0ff18ca6727eb3691186b_GH0.tar.gz) = 0a4f3a5beefbe56863e6e9b680054b7f88bb7aed9682c8bb04c9147345320b49
+SIZE (cseed-arachne-pnr-g20180310-6701132cbd5c7b31edd0ff18ca6727eb3691186b_GH0.tar.gz) = 91249
Added: head/devel/arachne-pnr/pkg-descr
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/devel/arachne-pnr/pkg-descr Wed Jun 6 13:47:33 2018 (r471842)
@@ -0,0 +1,5 @@
+Arachne-pnr implements the place and route step of the hardware
+compilation process for FPGAs. It currently targets the Lattice
+Semiconductor iCE40 family of FPGAs.
+
+WWW: https://github.com/cseed/arachne-pnr
Added: head/devel/arachne-pnr/pkg-plist
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/devel/arachne-pnr/pkg-plist Wed Jun 6 13:47:33 2018 (r471842)
@@ -0,0 +1,5 @@
+bin/arachne-pnr
+%%DATADIR%%/chipdb-1k.bin
+%%DATADIR%%/chipdb-384.bin
+%%DATADIR%%/chipdb-5k.bin
+%%DATADIR%%/chipdb-8k.bin
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