PERFORCE change 230989 for review
Brooks Davis
brooks at FreeBSD.org
Wed Jul 10 22:58:05 UTC 2013
http://p4web.freebsd.org/@@230989?ac=10
Change 230989 by brooks at brooks_zenith on 2013/07/10 22:57:08
Now that they will work on regular BERI/CHERI systmes add
configuration entries for a second CPU.
Affected files ...
.. //depot/projects/ctsrd/beribsd/src/sys/boot/fdt/dts/beri-sim.dts#4 edit
.. //depot/projects/ctsrd/beribsd/src/sys/boot/fdt/dts/beripad-de4.dts#25 edit
Differences ...
==== //depot/projects/ctsrd/beribsd/src/sys/boot/fdt/dts/beri-sim.dts#4 (text+ko) ====
@@ -47,9 +47,34 @@
#size-cells = <1>;
cpus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /*
+ * Secondary CPUs all start disabled and use the
+ * spin-table enable method. cpu-release-addr must be
+ * specified for each cpu other than cpu at 0. Values of
+ * cpu-release-addr grow down from 0x100000 (kernel).
+ */
+ status = "disabled";
+ enable-method = "spin-table";
+
cpu at 0 {
+ device-type = "cpu";
compatible = "sri-cambridge,beri";
+
+ reg = <0>;
+ status = "okay";
};
+
+ cpu at 1 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <1>;
+ // XXX: should we need cached prefix?
+ cpu-release-addr = <0xffffffff 0x800fffe0>;
+ };
};
soc {
@@ -69,10 +94,24 @@
reg = <0x0 0x4000000>; // 64M at 0x0
};
+ beripic: beripic at 7f804000 {
+ compatible = "sri-cambridge,beri-pic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg= <0x7f804000 0x400
+ 0x7f806000 0x10
+ 0x7f806080 0x10
+ 0x7f806100 0x10>;
+ interrupts = <0 1 2 3 4>;
+ hard-interrupt-sources = <64>;
+ soft-interrupt-sources = <64>;
+ };
+
serial at 7f000000 {
compatible = "altera,jtag_uart-11_0";
reg = <0x7f000000 0x40>;
- interrupts = <0>;
+ //interrupts = <0>;
};
serial at 7f001000 {
==== //depot/projects/ctsrd/beribsd/src/sys/boot/fdt/dts/beripad-de4.dts#25 (text+ko) ====
@@ -67,6 +67,15 @@
reg = <0>;
status = "okay";
};
+
+ cpu at 1 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <1>;
+ // XXX: should we need cached prefix?
+ cpu-release-addr = <0xffffffff 0x800fffe0>;
+ }
};
soc {
@@ -183,26 +192,26 @@
ethernet at 7f007000 {
compatible = "altera,atse";
- /* MAC, RX+RXC, TX+TXC. */
+ // MAC, RX+RXC, TX+TXC.
reg = <0x7f007000 0x400
0x7f007500 0x8
0x7f007520 0x20
0x7f007400 0x8
0x7f007420 0x20>;
- /* RX, TX */
+ // RX, TX
interrupts = <1 2>;
interrupt-parent = <&beripic>;
};
ethernet at 7f005000 {
compatible = "altera,atse";
- /* MAC, RX+RXC, TX+TXC. */
+ // MAC, RX+RXC, TX+TXC.
reg = <0x7f005000 0x400
0x7f005500 0x8
0x7f005520 0x20
0x7f005400 0x8
0x7f005420 0x20>;
- /* RX, TX */
+ // RX, TX
interrupts = <11 12>;
interrupt-parent = <&beripic>;
};
@@ -214,7 +223,6 @@
0x70177000 0x2000>;
};
-/*
usb at 0x7f100000 {
compatible = "philips,isp1761";
reg = <0x7f100000 0x40000
@@ -223,7 +231,6 @@
interrupts = <4 5>;
interrupt-parent = <&beripic>;
};
-*/
avgen at 0x7f009000 {
compatible = "sri-cambridge,avgen";
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