PERFORCE change 222408 for review
Brooks Davis
brooks at FreeBSD.org
Tue Feb 26 21:21:12 UTC 2013
http://p4web.freebsd.org/@@222408?ac=10
Change 222408 by brooks at brooks_zenith on 2013/02/26 21:20:31
Integrate changes from the beribsd branch. This includes
switching to the cfi(4) flash driver for storage and Robert's
port of boot2.
Affected files ...
.. //depot/projects/ctsrd/cheribsd/src/bin/dd/dd.c#4 integrate
.. //depot/projects/ctsrd/cheribsd/src/ctsrd-lib/libvuln_magic/Makefile#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/ctsrd/atsectl/atsectl.c#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/ctsrd/flashit/flashit.sh#4 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/common/util.c#3 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/fdt/dts/beripad-de4.dts#4 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/Makefile#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/altera_jtag_uart.c#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/boot2.c#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/cons.h#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/drv.h#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/flash.c#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/linker.cfg#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/mips.h#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/start.s#1 branch
.. //depot/projects/ctsrd/cheribsd/src/sys/conf/files#7 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/conf/files.powerpc#5 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/altera/atse/if_atse.c#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/altera/atse/if_atsereg.h#2 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_bus_fdt.c#4 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_core.c#5 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_reg.h#4 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_var.h#5 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/beri/files.beri#12 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/BERI_DE4.hints#10 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/BERI_DE4_BASE#3 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/BERI_DE4_MDROOT#9 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/BERI_DE4_SDROOT#6 integrate
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/BERI_TEMPLATE#7 integrate
Differences ...
==== //depot/projects/ctsrd/cheribsd/src/bin/dd/dd.c#4 (text+ko) ====
@@ -98,6 +98,13 @@
dd_in();
dd_close();
+ /*
+ * Some devices such as cfi(4) may perform significant amounts
+ * of work when a write descriptor is closed. Close the out
+ * descriptor explicitly so that the summary handler (called
+ * from an atexit() hook) includes this work.
+ */
+ close(out.fd);
exit(0);
}
==== //depot/projects/ctsrd/cheribsd/src/ctsrd-lib/libvuln_magic/Makefile#2 (text+ko) ====
@@ -12,7 +12,6 @@
SRCS= apprentice.c apptype.c ascmagic.c cdf.c cdf_time.c compress.c \
encoding.c fsmagic.c funcs.c \
is_tar.c magic.c print.c readcdf.c readelf.c softmagic.c
-INCS= magic.h
MAGICPATH?= /usr/share/misc
==== //depot/projects/ctsrd/cheribsd/src/ctsrd/atsectl/atsectl.c#2 (text+ko) ====
@@ -42,6 +42,7 @@
#include <sys/errno.h>
#include <sys/socket.h>
+#include <assert.h>
#include <err.h>
#include <fcntl.h>
#include <inttypes.h>
@@ -61,28 +62,34 @@
off_t ir_off; /* Offset of range to delete (set to 0xFF) */
size_t ir_size; /* Size of range */
};
-
#define ISF_ERASE _IOW('I', 1, struct isf_range)
-
#define ISF_ERASE_BLOCK (128 * 1024)
-
-#if 0
-static enum {UNSET, ERASE} action = UNSET;
-#endif
-
#define DEV_ISF0_PATH "/dev/isf0"
+#define DEV_CFI0_PATH "/dev/cfi0"
static u_char block[ISF_ERASE_BLOCK];
+#define UNKNOWN 0
+#define ISF 1
+#define CFI 2
+static int fdev = UNKNOWN;
+static const char *fdevs[] = {
+ "UNKNOWN",
+ "ISF",
+ "CFI"
+};
+static int gflag;
+
/* XXX-BZ should include if_atsereg.h. */
#define ALTERA_ETHERNET_OPTION_BITS_OFF 0x00008000
#define ALTERA_ETHERNET_OPTION_BITS_LEN 0x00007fff
+
static void
usage(int rc)
{
- fprintf(stderr, "usage: atsectl [-hlu] [-s <etheraddr>]\n");
+ fprintf(stderr, "usage: atsectl [-ghlu] [-s <etheraddr>]\n");
exit(rc);
}
@@ -93,10 +100,16 @@
fd = open(DEV_ISF0_PATH, O_RDONLY, 0);
if (fd == -1)
- errx(1, "Failed to open " DEV_ISF0_PATH);
+ fd = open(DEV_CFI0_PATH, O_RDONLY, 0);
+ else
+ fdev = ISF;
+ if (fd == -1)
+ errx(1, "Failed to open " DEV_CFI0_PATH);
+ else
+ fdev = CFI;
if (read(fd, block, sizeof(block)) != ISF_ERASE_BLOCK)
- errx(1, "Short read from " DEV_ISF0_PATH);
+ errx(1, "Short read from %s", fdevs[fdev]);
close(fd);
}
@@ -107,6 +120,9 @@
struct isf_range ir;
int fd;
+ if (fdev != ISF)
+ return;
+
fd = open(DEV_ISF0_PATH, O_RDONLY, 0);
if (fd == -1)
errx(1, "Failed to open " DEV_ISF0_PATH);
@@ -126,12 +142,16 @@
{
int fd;
+ assert(fdev == ISF || fdev == CFI);
+
fd = open(DEV_ISF0_PATH, O_WRONLY, 0);
if (fd == -1)
- errx(1, "Failed to open " DEV_ISF0_PATH);
+ fd = open(DEV_CFI0_PATH, O_WRONLY, 0);
+ if (fd == -1)
+ errx(1, "Failed to open " DEV_CFI0_PATH);
if (write(fd, block, sizeof(block)) != ISF_ERASE_BLOCK)
- errx(1, "Short write on " DEV_ISF0_PATH);
+ errx(1, "Short write on %s", fdevs[fdev]);
close(fd);
}
@@ -188,15 +208,20 @@
{
uint8_t buf[32];
MD5_CTX ctx;
+ int rc;
printf("Original:\n");
read_block();
print_eaddr();
if (eaddr == NULL) {
- /* isf0.factory_ppr="0x0123456789abcdef" */
- if (kenv(KENV_GET, "isf0.factory_ppr", buf, sizeof(buf)) == -1)
- err(1, "Could not find isf PPR serial\n");
+ /* (isf|cfi)0.factory_ppr="0x0123456789abcdef" */
+ rc = kenv(KENV_GET, "isf0.factory_ppr", buf, sizeof(buf));
+ if (rc == -1)
+ rc = kenv(KENV_GET, "cfi0.factory_ppr", buf,
+ sizeof(buf));
+ if (rc == -1)
+ err(1, "Could not find Intel flash PPR serial\n");
MD5Init(&ctx);
MD5Update(&ctx, buf+2, 16);
@@ -211,8 +236,11 @@
/* Just make sure the last half-byte is really zero. */
block[ALTERA_ETHERNET_OPTION_BITS_OFF + 9] &= ~0x0f;
- /* Set locally administred flag. */
- block[ALTERA_ETHERNET_OPTION_BITS_OFF + 4] |= 2;
+ /* Set (or clear) locally administred flag. */
+ if (gflag == 0)
+ block[ALTERA_ETHERNET_OPTION_BITS_OFF + 4] |= 2;
+ else
+ block[ALTERA_ETHERNET_OPTION_BITS_OFF + 4] &= ~2;
/* Make sure it is not a MC address by accident we start with. */
block[ALTERA_ETHERNET_OPTION_BITS_OFF + 4] &= ~1;
} else {
@@ -231,7 +259,7 @@
warnx("WARN: Selected Ethernet Address is "
"not multi-MAC compatible.\n");
}
- if ((eaddr[0] & 0x2) == 0x0) {
+ if (gflag == 0 && ((eaddr[0] & 0x2) == 0x0)) {
e++;
warnx("WARN: Locally administered bit not set.\n");
}
@@ -303,8 +331,11 @@
char ch, *s;
s = NULL;
- while ((ch = getopt(argc, argv, "hlus:")) != -1) {
+ while ((ch = getopt(argc, argv, "ghlus:")) != -1) {
switch (ch) {
+ case 'g':
+ gflag = 1;
+ break;
case 'h':
usage(0);
/* NOTREACHED */
==== //depot/projects/ctsrd/cheribsd/src/ctsrd/flashit/flashit.sh#4 (text+ko) ====
@@ -1,32 +1,28 @@
#!/bin/sh
-isf0_DEV=isf0
-isf0_OFFSET=0
-isf0_MAXLEN=0x02000000
-
-isf1_DEV=isf1
-isf1_OFFSET=0
-isf1_MAXLEN=0x02000000
-
-boot_DEV=isf0
+boot_DEV=cfid0
boot_OFFSET=0x01F00000
boot_MAXLEN=0x100000
-fpga_DEV=isf0
+fpga_DEV=cfid0
fpga_OFFSET=0x00020000
fpga_MAXLEN=0x00C00000
fpga_SKIP=0x20000
-fpga2_DEV=isf0
+fpga2_DEV=cfid0
fpga2_OFFSET=0x00C20000
fpga2_MAXLEN=0x00C00000
fpga2_SKIP=0x20000
-kernel_DEV=isf1
-kernel_OFFSET=0x00000000
+osconfig_DEV=cfid0
+osconfig_OFFSET=0x01820000
+osconfig_MAXLEN=0x00020000
+
+kernel_DEV=cfid0
+kernel_OFFSET=0x02000000
kernel_MAXLEN=0x02000000
-TARGETS="boot:fpga:kernel:kernel2:root"
+TARGETS="boot:fpga:fpga2:osconfig:kernel"
prog=`basename "$0"`
@@ -152,20 +148,6 @@
fi
fi
-ksize=$((${size} / 1024))
-eblocks=$((${ksize} / 128))
-if [ $((${ksize} % 128)) -ne 0 ]; then
- eblocks=$((${eblocks} + 1))
-fi
-echo "Erasing ${eblocks} 128K blocks from ${OFFSET} on ${DEV}"
-if [ ${DRYRUN} -eq 0 ]; then
- /usr/sbin/isfctl ${DEV} erase ${OFFSET} \
- $((${eblocks} * 128 * 1024))
- if [ $? -ne 0 ]; then
- err 1 "Failed to erase"
- fi
-fi
-
echo "Writing ${binfile} to ${DEV} @ ${OFFSET}"
if [ ${DRYRUN} -eq 0 ]; then
iseek=$((`printf "%d" ${SKIP}` / 512))
==== //depot/projects/ctsrd/cheribsd/src/sys/boot/common/util.c#3 (text+ko) ====
@@ -125,7 +125,15 @@
va_start(ap, fmt);
while ((c = *fmt++) != '\0') {
- if (c != '%') {
+ switch (c) {
+ case '%':
+ break;
+
+ case '\n':
+ putchar('\r');
+ /* FALLTHROUGH */
+
+ default:
putchar(c);
continue;
}
==== //depot/projects/ctsrd/cheribsd/src/sys/boot/fdt/dts/beripad-de4.dts#4 (text+ko) ====
@@ -99,14 +99,9 @@
* XXX-BZ keep flash before ethernet so that atse can read the
* Ethernet addresses for now.
*/
- flash at 0x74000000 {
- compatible = "intel,strataflash";
- reg = <0x74000000 0x2000000>;
- };
-
- flash at 0x76000000 {
- compatible = "intel,strataflash";
- reg = <0x76000000 0x2000000>;
+ flash at 74000000 {
+ compatible = "cfi-flash";
+ reg = <0x74000000 0x4000000>;
};
ethernet at 7f007000 {
==== //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/Makefile#2 (text+ko) ====
@@ -1,15 +1,38 @@
# $FreeBSD$
-P=boot2
-FILES=${P}
-SRCS=mips_init.S boot2.c beri_board.c
+PROG= boot2
+BINDIR?= /boot
+INSTALLFLAGS= -b
+
+FILES= ${PROG}
+SRCS= start.s \
+ boot2.c \
+ altera_jtag_uart.c \
+ flash.c
+
NO_MAN=
-LDFLAGS=-e 0 -T ${.CURDIR}/../linker.cfg
-OBJS+= ${SRCS:N*.h:R:S/$/.o/g}
+
+AFLAGS= -G0
+
+CFLAGS= -ffreestanding \
+ -I${.CURDIR} \
+ -I${.CURDIR}/../../../common \
+ -I${.CURDIR}/../../../.. \
+ -D_KERNEL \
+ -Wall \
+ -G0 -Xassembler -G0 \
+ -fno-pic -mno-abicalls \
+ -g
+
+LDFLAGS= -nostdlib \
+ -static \
+ -N \
+ -T linker.cfg \
+ -G0
+
+boot2: linker.cfg
+
+boot2.img: boot2
+ objcopy -S -O binary boot2 boot2.img
.include <bsd.prog.mk>
-
-CFLAGS+= \
- -I${.CURDIR}/../../../common \
- -I${.CURDIR}/../../../.. \
- -D_KERNEL
==== //depot/projects/ctsrd/cheribsd/src/sys/boot/mips/beri/boot2/boot2.c#2 (text+ko) ====
@@ -1,4 +1,32 @@
/*-
+ * Copyright (c) 2013 Robert N. M. Watson
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
* Copyright (c) 2008 John Hay
* Copyright (c) 2006 Warner Losh
* Copyright (c) 1998 Robert Nordier
@@ -28,8 +56,11 @@
#include <stdarg.h>
-#include "lib.h"
-#include "board.h"
+#include "cons.h"
+#include "drv.h"
+
+//#include "lib.h"
+//#include "board.h"
#define RBX_ASKNAME 0x0 /* -a */
#define RBX_SINGLE 0x1 /* -s */
@@ -66,8 +97,7 @@
#define PATH_DOTCONFIG "/boot.config"
#define PATH_CONFIG "/boot/config"
-//#define PATH_KERNEL "/boot/kernel/kernel"
-#define PATH_KERNEL "/boot/kernel/kernel.gz.tramp"
+#define PATH_KERNEL "/boot/kernel/kernel"
extern uint32_t _end;
@@ -100,9 +130,12 @@
static void fixup_boot_drv(caddr_t, int, int, int);
#endif
+#include "util.c"
#define UFS_SMALL_CGBASE
#include "ufsread.c"
+static struct dmadat __dmadat;
+
#ifdef DEBUG
#define DPRINTF(fmt, ...) printf(fmt, __VA_ARGS__)
#else
@@ -143,7 +176,7 @@
default:
if (s - cmd < sizeof(cmd) - 1)
*s++ = c;
- xputchar(c);
+ putchar(c);
}
c = getc(10000);
}
@@ -155,8 +188,8 @@
int autoboot, c = 0;
ufs_ino_t ino;
- dmadat = (void *)(0x20000000 + (16 << 20));
- board_init();
+ dmadat = &__dmadat;
+ //board_init();
autoboot = 1;
@@ -182,11 +215,11 @@
if (!autoboot ||
(OPT_CHECK(RBX_NOINTR) == 0 && (c = getc(2)) != 0))
getstr(c);
- xputchar('\n');
+ printf("\n");
autoboot = 0;
c = 0;
if (parse())
- xputchar('\a');
+ putchar('\a');
else
load();
}
@@ -195,11 +228,11 @@
static void
load(void)
{
- Elf32_Ehdr eh;
- static Elf32_Phdr ep[2];
+ Elf64_Ehdr eh;
+ static Elf64_Phdr ep[2];
caddr_t p;
ufs_ino_t ino;
- uint32_t addr;
+ uint64_t addr;
int i, j;
#ifdef FIXUP_BOOT_DRV
caddr_t staddr;
@@ -281,6 +314,7 @@
static int
dskread(void *buf, unsigned lba, unsigned nblk)
{
+#if 0
struct dos_partition *dp;
struct disklabel *d;
char *sec;
@@ -321,6 +355,7 @@
dsk_start -= d->d_partitions[RAW_PART].p_offset;
dsk_meta++;
}
+#endif
return drvread(buf, dsk_start + lba, nblk);
}
==== //depot/projects/ctsrd/cheribsd/src/sys/conf/files#7 (text+ko) ====
@@ -1046,6 +1046,8 @@
dev/cardbus/cardbus_cis.c optional cardbus
dev/cardbus/cardbus_device.c optional cardbus
dev/cas/if_cas.c optional cas
+dev/cfi/cfi_bus_fdt.c optional cfi fdt
+dev/cfi/cfi_bus_nexus.c optional cfi
dev/cfi/cfi_core.c optional cfi
dev/cfi/cfi_dev.c optional cfi
dev/cfi/cfi_disk.c optional cfid
==== //depot/projects/ctsrd/cheribsd/src/sys/conf/files.powerpc#5 (text+ko) ====
@@ -27,7 +27,6 @@
dev/adb/adb_if.m optional adb
dev/adb/adb_buttons.c optional adb
dev/agp/agp_apple.c optional agp powermac
-dev/cfi/cfi_bus_fdt.c optional cfi fdt
dev/fb/fb.c optional sc
dev/fdt/fdt_powerpc.c optional fdt
dev/hwpmc/hwpmc_powerpc.c optional hwpmc
==== //depot/projects/ctsrd/cheribsd/src/sys/dev/altera/atse/if_atse.c#2 (text+ko) ====
@@ -630,18 +630,21 @@
atse_ethernet_option_bits_read_fdt(device_t dev)
{
struct resource *res;
- device_t isfdev;
+ device_t fdev;
int i, rid;
if (atse_ethernet_option_bits_flag & ATSE_ETHERNET_OPTION_BITS_READ)
return (0);
- isfdev = device_find_child(device_get_parent(dev), "isf", 0);
- if (isfdev == NULL)
- return (ENOENT);
+ fdev = device_find_child(device_get_parent(dev), "isf", 0);
+ if (fdev == NULL) {
+ fdev = device_find_child(device_get_parent(dev), "cfi", 0);
+ if (fdev == NULL)
+ return (ENOENT);
+ }
rid = 0;
- res = bus_alloc_resource_any(isfdev, SYS_RES_MEMORY, &rid,
+ res = bus_alloc_resource_any(fdev, SYS_RES_MEMORY, &rid,
RF_ACTIVE | RF_SHAREABLE);
if (res == NULL)
return (ENXIO);
@@ -650,7 +653,7 @@
atse_ethernet_option_bits[i] = bus_read_1(res,
ALTERA_ETHERNET_OPTION_BITS_OFF + i);
- bus_release_resource(dev, SYS_RES_MEMORY, rid, res);
+ bus_release_resource(fdev, SYS_RES_MEMORY, rid, res);
atse_ethernet_option_bits_flag |= ATSE_ETHERNET_OPTION_BITS_READ;
return (0);
@@ -1195,6 +1198,17 @@
return (error);
}
+static void
+atse_update_rx_err(struct atse_softc *sc, uint32_t mask)
+{
+ int i;
+
+ /* RX error are 6 bits, we only know 4 of them. */
+ for (i = 0; i < ATSE_RX_ERR_MAX; i++)
+ if ((mask & (1 << i)) != 0)
+ sc->atse_rx_err[i]++;
+}
+
static int
atse_rx_locked(struct atse_softc *sc)
{
@@ -1235,6 +1249,9 @@
meta = ATSE_RX_META_READ(sc);
if (meta & A_ONCHIP_FIFO_MEM_CORE_ERROR_MASK) {
/* XXX-BZ evaluate error. */
+ atse_update_rx_err(sc, ((meta &
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_MASK) >>
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_SHIFT) & 0xff);
ifp->if_ierrors++;
sc->atse_rx_buf_len = 0;
/*
@@ -1382,6 +1399,9 @@
if (rx & (A_ONCHIP_FIFO_MEM_CORE_EVENT_OVERFLOW|
A_ONCHIP_FIFO_MEM_CORE_EVENT_UNDERFLOW)) {
/* XXX-BZ ERROR HANDLING. */
+ atse_update_rx_err(sc, ((rx &
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_MASK) >>
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_SHIFT) & 0xff);
ifp->if_ierrors++;
}
if ((rx & A_ONCHIP_FIFO_MEM_CORE_EVENT_EMPTY) != 0) {
@@ -1448,6 +1468,9 @@
if (rx & (A_ONCHIP_FIFO_MEM_CORE_EVENT_OVERFLOW|
A_ONCHIP_FIFO_MEM_CORE_EVENT_UNDERFLOW)) {
/* XXX-BZ ERROR HANDLING. */
+ atse_update_rx_err(sc, ((rx &
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_MASK) >>
+ A_ONCHIP_FIFO_MEM_CORE_ERROR_SHIFT) & 0xff);
ifp->if_ierrors++;
}
if (tx & (A_ONCHIP_FIFO_MEM_CORE_EVENT_OVERFLOW|
@@ -1471,6 +1494,208 @@
}
#endif /* DEVICE_POLLING */
+static struct atse_mac_stats_regs {
+ const char *name;
+ const char *descr; /* Mostly copied from Altera datasheet. */
+} atse_mac_stats_regs[] = {
+ [0x1a] =
+ { "aFramesTransmittedOK",
+ "The number of frames that are successfully transmitted including "
+ "the pause frames." },
+ { "aFramesReceivedOK",
+ "The number of frames that are successfully received including the "
+ "pause frames." },
+ { "aFrameCheckSequenceErrors",
+ "The number of receive frames with CRC error." },
+ { "aAlignmentErrors",
+ "The number of receive frames with alignment error." },
+ { "aOctetsTransmittedOK",
+ "The lower 32 bits of the number of data and padding octets that "
+ "are successfully transmitted." },
+ { "aOctetsReceivedOK",
+ "The lower 32 bits of the number of data and padding octets that "
+ " are successfully received." },
+ { "aTxPAUSEMACCtrlFrames",
+ "The number of pause frames transmitted." },
+ { "aRxPAUSEMACCtrlFrames",
+ "The number received pause frames received." },
+ { "ifInErrors",
+ "The number of errored frames received." },
+ { "ifOutErrors",
+ "The number of transmit frames with either a FIFO overflow error, "
+ "a FIFO underflow error, or a error defined by the user "
+ "application." },
+ { "ifInUcastPkts",
+ "The number of valid unicast frames received." },
+ { "ifInMulticastPkts",
+ "The number of valid multicast frames received. The count does "
+ "not include pause frames." },
+ { "ifInBroadcastPkts",
+ "The number of valid broadcast frames received." },
+ { "ifOutDiscards",
+ "This statistics counter is not in use. The MAC function does not "
+ "discard frames that are written to the FIFO buffer by the user "
+ "application." },
+ { "ifOutUcastPkts",
+ "The number of valid unicast frames transmitted." },
+ { "ifOutMulticastPkts",
+ "The number of valid multicast frames transmitted, excluding pause "
+ "frames." },
+ { "ifOutBroadcastPkts",
+ "The number of valid broadcast frames transmitted." },
+ { "etherStatsDropEvents",
+ "The number of frames that are dropped due to MAC internal errors "
+ "when FIFO buffer overflow persists." },
+ { "etherStatsOctets",
+ "The lower 32 bits of the total number of octets received. This "
+ "count includes both good and errored frames." },
+ { "etherStatsPkts",
+ "The total number of good and errored frames received." },
+ { "etherStatsUndersizePkts",
+ "The number of frames received with length less than 64 bytes. "
+ "This count does not include errored frames." },
+ { "etherStatsOversizePkts",
+ "The number of frames received that are longer than the value "
+ "configured in the frm_length register. This count does not "
+ "include errored frames." },
+ { "etherStatsPkts64Octets",
+ "The number of 64-byte frames received. This count includes good "
+ "and errored frames." },
+ { "etherStatsPkts65to127Octets",
+ "The number of received good and errored frames between the length "
+ "of 65 and 127 bytes." },
+ { "etherStatsPkts128to255Octets",
+ "The number of received good and errored frames between the length "
+ "of 128 and 255 bytes." },
+ { "etherStatsPkts256to511Octets",
+ "The number of received good and errored frames between the length "
+ "of 256 and 511 bytes." },
+ { "etherStatsPkts512to1023Octets",
+ "The number of received good and errored frames between the length "
+ "of 512 and 1023 bytes." },
+ { "etherStatsPkts1024to1518Octets",
+ "The number of received good and errored frames between the length "
+ "of 1024 and 1518 bytes." },
+ { "etherStatsPkts1519toXOctets",
+ "The number of received good and errored frames between the length "
+ "of 1519 and the maximum frame length configured in the frm_length "
+ "register." },
+ { "etherStatsJabbers",
+ "Too long frames with CRC error." },
+ { "etherStatsFragments",
+ "Too short frames with CRC error." },
+ /* 0x39 unused, 0x3a/b non-stats. */
+ [0x3c] =
+ /* Extended Statistics Counters */
+ { "msb_aOctetsTransmittedOK",
+ "Upper 32 bits of the number of data and padding octets that are "
+ "successfully transmitted." },
+ { "msb_aOctetsReceivedOK",
+ "Upper 32 bits of the number of data and padding octets that are "
+ "successfully received." },
+ { "msb_etherStatsOctets",
+ "Upper 32 bits of the total number of octets received. This count "
+ "includes both good and errored frames." }
+};
+
+static int
+sysctl_atse_mac_stats_proc(SYSCTL_HANDLER_ARGS)
+{
+ struct atse_softc *sc;
+ int error, offset, s;
+
+ sc = arg1;
+ offset = arg2;
+
+ s = CSR_READ_4(sc, offset);
+ error = sysctl_handle_int(oidp, &s, 0, req);
+ if (error || !req->newptr)
+ return (error);
+
+ return (0);
+}
+
+static struct atse_rx_err_stats_regs {
+ const char *name;
+ const char *descr;
+} atse_rx_err_stats_regs[] = {
+
+#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */
+#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */
+#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */
+#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */
+#define ATSE_RX_ERR_4 4 /* ? */
+#define ATSE_RX_ERR_5 5 /* / */
+
+ { "rx_err_fifo_thres_eop",
+ "FIFO threshold reached, reported on EOP." },
+ { "rx_err_fifo_elen",
+ "Frame or payload length not valid." },
+ { "rx_err_fifo_crc32",
+ "CRC-32 error." },
+ { "rx_err_fifo_thres_trunc",
+ "FIFO threshold reached, truncated frame" },
+ { "rx_err_4",
+ "?" },
+ { "rx_err_5",
+ "?" },
+};
+
+static int
+sysctl_atse_rx_err_stats_proc(SYSCTL_HANDLER_ARGS)
+{
+ struct atse_softc *sc;
+ int error, offset, s;
+
+ sc = arg1;
+ offset = arg2;
+
+ s = sc->atse_rx_err[offset];
+ error = sysctl_handle_int(oidp, &s, 0, req);
+ if (error || !req->newptr)
+ return (error);
+
+ return (0);
+}
+
+static void
+atse_sysctl_stats_attach(device_t dev)
+{
+ struct sysctl_ctx_list *sctx;
+ struct sysctl_oid *soid;
+ struct atse_softc *sc;
+ int i;
+
+ sc = device_get_softc(dev);
+ sctx = device_get_sysctl_ctx(dev);
+ soid = device_get_sysctl_tree(dev);
+
+ /* MAC statistics. */
+ for (i = 0; i < sizeof(atse_mac_stats_regs) /
+ sizeof(*atse_mac_stats_regs); i++) {
+ if (atse_mac_stats_regs[i].name == NULL ||
+ atse_mac_stats_regs[i].descr == NULL)
+ continue;
+
+ SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO,
+ atse_mac_stats_regs[i].name, CTLTYPE_UINT|CTLFLAG_RD,
+ sc, i, sysctl_atse_mac_stats_proc, "IU",
+ atse_mac_stats_regs[i].descr);
+ }
+
+ /* rx_err[]. */
+ for (i = 0; i < ATSE_RX_ERR_MAX; i++) {
+ if (atse_rx_err_stats_regs[i].name == NULL ||
+ atse_rx_err_stats_regs[i].descr == NULL)
+ continue;
+
+ SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO,
+ atse_rx_err_stats_regs[i].name, CTLTYPE_UINT|CTLFLAG_RD,
+ sc, i, sysctl_atse_rx_err_stats_proc, "IU",
+ atse_rx_err_stats_regs[i].descr);
+ }
+}
+
/*
* Generic device handling routines.
*/
@@ -1595,6 +1820,9 @@
if (error != 0)
atse_detach(dev);
+ if (error == 0)
+ atse_sysctl_stats_attach(dev);
+
return (error);
}
==== //depot/projects/ctsrd/cheribsd/src/sys/dev/altera/atse/if_atsereg.h#2 (text+ko) ====
@@ -395,7 +395,7 @@
/* -------------------------------------------------------------------------- */
/* DE4 Intel Strata Flash Ethernet Option Bits area. */
-/* XXX-BZ this is something a loader will ahve to handle for us. */
+/* XXX-BZ this is something a loader will have to handle for us. */
#define ALTERA_ETHERNET_OPTION_BITS_OFF 0x00008000
#define ALTERA_ETHERNET_OPTION_BITS_LEN 0x00007fff
@@ -456,6 +456,14 @@
uint16_t atse_rx_buf_len;
int16_t atse_rx_cycles; /* POLLING */
#define RX_CYCLES_IN_INTR 5
+ uint32_t atse_rx_err[6];
+#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */
+#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */
+#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */
+#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */
+#define ATSE_RX_ERR_4 4 /* ? */
+#define ATSE_RX_ERR_5 5 /* / */
+#define ATSE_RX_ERR_MAX 6
struct callout atse_tick;
struct mtx atse_mtx;
};
==== //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_bus_fdt.c#4 (text+ko) ====
@@ -61,6 +61,7 @@
};
DRIVER_MODULE (cfi, lbc, cfi_fdt_driver, cfi_devclass, 0, 0);
+DRIVER_MODULE (cfi, simplebus, cfi_fdt_driver, cfi_devclass, 0, 0);
static int
cfi_fdt_probe(device_t dev)
==== //depot/projects/ctsrd/cheribsd/src/sys/dev/cfi/cfi_core.c#5 (text+ko) ====
@@ -37,6 +37,7 @@
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/endian.h>
+#include <sys/kenv.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/module.h>
@@ -259,26 +260,63 @@
cfi_attach(device_t dev)
{
struct cfi_softc *sc;
+ struct timeval tv;
u_int blksz, blocks;
- u_int r, u;
+ u_int r, u, usec;
+#ifdef CFI_SUPPORT_STRATAFLASH
+ uint64_t ppr;
+ char name[KENV_MNAMELEN], value[32];
+#endif
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_rid = 0;
sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid,
- RF_ACTIVE);
+ RF_ACTIVE | RF_SHAREABLE);
if (sc->sc_res == NULL)
return (ENXIO);
sc->sc_tag = rman_get_bustag(sc->sc_res);
sc->sc_handle = rman_get_bushandle(sc->sc_res);
- /* Get time-out values for erase and write. */
- sc->sc_write_timeout = 1 << cfi_read_qry(sc, CFI_QRY_TTO_WRITE);
- sc->sc_erase_timeout = 1 << cfi_read_qry(sc, CFI_QRY_TTO_ERASE);
- sc->sc_write_timeout *= 1 << cfi_read_qry(sc, CFI_QRY_MTO_WRITE);
- sc->sc_erase_timeout *= 1 << cfi_read_qry(sc, CFI_QRY_MTO_ERASE);
+ /* Get time-out values for erase, write, and buffer write. */
+ bintime_clear(&sc->sc_typical_timeouts[CFI_TIMEOUT_ERASE]);
+ usec = 1000 * (1 << cfi_read_qry(sc, CFI_QRY_TTO_ERASE));
+ tv.tv_sec = usec / 1000000;
+ tv.tv_usec = usec % 1000000;
+ timeval2bintime(&tv, &sc->sc_typical_timeouts[CFI_TIMEOUT_ERASE]);
+ sc->sc_max_timeouts[CFI_TIMEOUT_ERASE] =
+ sc->sc_typical_timeouts[CFI_TIMEOUT_ERASE];
+ bintime_mul(&sc->sc_max_timeouts[CFI_TIMEOUT_ERASE],
+ 1 << cfi_read_qry(sc, CFI_QRY_MTO_ERASE));
+
+ bintime_clear(&sc->sc_typical_timeouts[CFI_TIMEOUT_WRITE]);
+ usec = 1 << cfi_read_qry(sc, CFI_QRY_TTO_WRITE);
+ tv.tv_sec = usec / 1000000;
+ tv.tv_usec = usec % 1000000;
+ timeval2bintime(&tv, &sc->sc_typical_timeouts[CFI_TIMEOUT_WRITE]);
+ sc->sc_max_timeouts[CFI_TIMEOUT_WRITE] =
+ sc->sc_typical_timeouts[CFI_TIMEOUT_WRITE];
+ bintime_mul(&sc->sc_max_timeouts[CFI_TIMEOUT_WRITE],
+ 1 << cfi_read_qry(sc, CFI_QRY_MTO_WRITE));
+
+ bintime_clear(&sc->sc_typical_timeouts[CFI_TIMEOUT_BUFWRITE]);
+ usec = 1 << cfi_read_qry(sc, CFI_QRY_TTO_BUFWRITE);
+ tv.tv_sec = usec / 1000000;
+ tv.tv_usec = usec % 1000000;
+ timeval2bintime(&tv, &sc->sc_typical_timeouts[CFI_TIMEOUT_BUFWRITE]);
+ sc->sc_max_timeouts[CFI_TIMEOUT_BUFWRITE] =
+ sc->sc_typical_timeouts[CFI_TIMEOUT_BUFWRITE];
+ bintime_mul(&sc->sc_max_timeouts[CFI_TIMEOUT_BUFWRITE],
+ 1 << cfi_read_qry(sc, CFI_QRY_MTO_BUFWRITE));
+
+ /* Get the maximum size of a multibyte program */
+ if (bintime_isset(&sc->sc_typical_timeouts[CFI_TIMEOUT_BUFWRITE]))
+ sc->sc_maxbuf = 1 << (cfi_read_qry(sc, CFI_QRY_MAXBUF) |
+ cfi_read_qry(sc, CFI_QRY_MAXBUF) << 8);
+ else
+ sc->sc_maxbuf = 0;
/* Get erase regions. */
sc->sc_regions = cfi_read_qry(sc, CFI_QRY_NREGIONS);
@@ -312,6 +350,20 @@
"%s%u", cfi_driver_name, u);
sc->sc_nod->si_drv1 = sc;
+#ifdef CFI_SUPPORT_STRATAFLASH
+ /*
+ * Store the Intel factory PPR in the environment. In many
+ * cases it is the most unique ID on a board.
+ */
+ if (cfi_intel_get_factory_pr(sc, &ppr) == 0) {
+ if (snprintf(name, sizeof(name), "%s.factory_ppr",
+ device_get_nameunit(dev)) < (sizeof(name) - 1) &&
+ snprintf(value, sizeof(value), "0x%016jx", ppr) <
+ (sizeof(value) - 1))
+ (void) setenv(name, value);
+ }
+#endif
+
device_add_child(dev, "cfid", -1);
bus_generic_attach(dev);
@@ -332,18 +384,21 @@
}
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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