PERFORCE change 159016 for review
Hans Petter Selasky
hselasky at FreeBSD.org
Tue Mar 10 11:38:18 PDT 2009
http://perforce.freebsd.org/chv.cgi?CH=159016
Change 159016 by hselasky at hselasky_laptop001 on 2009/03/10 18:38:16
USB controller: Patches to make ATMEGA DCI work.
- add more debugging prints.
Affected files ...
.. //depot/projects/usb/src/sys/dev/usb/controller/atmegadci.c#3 edit
.. //depot/projects/usb/src/sys/dev/usb/controller/atmegadci.h#2 edit
Differences ...
==== //depot/projects/usb/src/sys/dev/usb/controller/atmegadci.c#3 (text+ko) ====
@@ -66,7 +66,7 @@
ATMEGA_BUS2SC((pc)->tag_parent->info->bus)
#if USB_DEBUG
-static int atmegadci_debug = 0;
+static int atmegadci_debug = 6;
SYSCTL_NODE(_hw_usb2, OID_AUTO, atmegadci, CTLFLAG_RW, 0, "USB ATMEGA DCI");
SYSCTL_INT(_hw_usb2_atmegadci, OID_AUTO, debug, CTLFLAG_RW,
@@ -226,8 +226,6 @@
{
DPRINTFN(5, "addr=%d\n", addr);
- ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, addr);
-
addr |= ATMEGA_UDADDR_ADDEN;
ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, addr);
@@ -296,6 +294,8 @@
if ((req.bmRequestType == UT_WRITE_DEVICE) &&
(req.bRequest == UR_SET_ADDRESS)) {
sc->sc_dv_addr = req.wValue[0] & 0x7F;
+ /* must write address before ZLP */
+ ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, sc->sc_dv_addr);
} else {
sc->sc_dv_addr = 0xFF;
}
@@ -652,6 +652,8 @@
/* clear all set interrupts */
ATMEGA_WRITE_1(sc, ATMEGA_UDINT, ~status);
+ DPRINTFN(14, "UDINT=0x%02x\n", status);
+
/* check for any bus state change interrupts */
if (status & ATMEGA_UDINT_EORSTI) {
@@ -723,6 +725,8 @@
if (status & ATMEGA_USBINT_VBUSTI) {
uint8_t temp;
+ DPRINTFN(5, "USBINT=0x%02x\n", status);
+
temp = ATMEGA_READ_1(sc, ATMEGA_USBSTA);
atmegadci_vbus_interrupt(sc, temp & ATMEGA_USBSTA_VBUS);
}
@@ -734,7 +738,7 @@
if (status) {
- DPRINTFN(5, "real endpoint interrupt 0x%02x\n", status);
+ DPRINTFN(5, "real endpoint interrupt UEINT=0x%02x\n", status);
atmegadci_interrupt_poll(sc);
}
@@ -1086,7 +1090,7 @@
USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
- DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
+ DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
xfer, xfer->pipe, error);
if (xfer->flags_int.usb2_mode == USB_MODE_DEVICE) {
@@ -1164,15 +1168,7 @@
ATMEGA_UECONX_EPEN |
ATMEGA_UECONX_STALLRQC);
- if (ep_type == UE_CONTROL) {
- /* one bank, 64-bytes wMaxPacket */
- ATMEGA_WRITE_1(sc, ATMEGA_UECFG0X,
- ATMEGA_UECFG0X_EPTYPE0);
- ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
- ATMEGA_UECFG1X_ALLOC |
- ATMEGA_UECFG1X_EPBK0 |
- ATMEGA_UECFG1X_EPSIZE(7));
- } else {
+ do {
temp = 0;
if (ep_type == UE_BULK) {
temp |= ATMEGA_UECFG0X_EPTYPE2;
@@ -1189,13 +1185,13 @@
ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
ATMEGA_UECFG1X_ALLOC |
ATMEGA_UECFG1X_EPBK1 |
- ATMEGA_UECFG1X_EPSIZE(7));
+ ATMEGA_UECFG1X_EPSIZE(3));
temp = ATMEGA_READ_1(sc, ATMEGA_UESTA0X);
if (!(temp & ATMEGA_UESTA0X_CFGOK)) {
DPRINTFN(0, "Chip rejected configuration\n");
}
- }
+ } while (0);
}
static void
@@ -1238,16 +1234,21 @@
sc->sc_bus.methods = &atmegadci_bus_methods;
USB_BUS_LOCK(&sc->sc_bus);
+#if 0
+ /* XXX TODO - currently done by boot strap */
/* enable USB PAD regulator */
ATMEGA_WRITE_1(sc, ATMEGA_UHWCON,
- ATMEGA_UHWCON_UVREGE);
-
+ ATMEGA_UHWCON_UVREGE | ATMEGA_UHWCON_UIMOD);
+#endif
/* turn on clocks */
(sc->sc_clocks_on) (&sc->sc_bus);
+ /* make sure device is re-enumerated */
+ ATMEGA_WRITE_1(sc, ATMEGA_UDCON, ATMEGA_UDCON_DETACH);
+
/* wait a little for things to stabilise */
- usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
+ usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
/* enable interrupts */
ATMEGA_WRITE_1(sc, ATMEGA_UDIEN,
@@ -1262,7 +1263,7 @@
ATMEGA_WRITE_1(sc, ATMEGA_UERST, 0);
/* disable all endpoints */
- for (n = 1; n != ATMEGA_EP_MAX; n++) {
+ for (n = 0; n != ATMEGA_EP_MAX; n++) {
/* select endpoint */
ATMEGA_WRITE_1(sc, ATMEGA_UENUM, n);
@@ -1694,6 +1695,7 @@
struct atmegadci_softc *sc = ATMEGA_BUS2SC(xfer->xroot->bus);
uint16_t value;
uint16_t index;
+ uint8_t temp;
USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
@@ -1982,7 +1984,38 @@
atmegadci_clocks_off(sc);
break;
case UHF_C_PORT_CONNECTION:
+ /* clear connect change flag */
sc->sc_flags.change_connect = 0;
+
+ /* configure the control endpoint */
+
+ /* select endpoint number */
+ ATMEGA_WRITE_1(sc, ATMEGA_UENUM, 0);
+
+ /* set endpoint reset */
+ ATMEGA_WRITE_1(sc, ATMEGA_UERST, ATMEGA_UERST_MASK(0));
+
+ /* clear endpoint reset */
+ ATMEGA_WRITE_1(sc, ATMEGA_UERST, 0);
+
+ /* enable and stall endpoint */
+ ATMEGA_WRITE_1(sc, ATMEGA_UECONX,
+ ATMEGA_UECONX_EPEN |
+ ATMEGA_UECONX_STALLRQ);
+
+ /* one bank, 64-bytes wMaxPacket */
+ ATMEGA_WRITE_1(sc, ATMEGA_UECFG0X,
+ ATMEGA_UECFG0X_EPTYPE0);
+ ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
+ ATMEGA_UECFG1X_ALLOC |
+ ATMEGA_UECFG1X_EPBK0 |
+ ATMEGA_UECFG1X_EPSIZE(3));
+
+ /* check valid config */
+ temp = ATMEGA_READ_1(sc, ATMEGA_UESTA0X);
+ if (!(temp & ATMEGA_UESTA0X_CFGOK)) {
+ DPRINTFN(0, "Chip rejected EP0 configuration\n");
+ }
break;
case UHF_C_PORT_SUSPEND:
sc->sc_flags.change_suspend = 0;
@@ -2258,10 +2291,10 @@
{
struct atmegadci_softc *sc = ATMEGA_BUS2SC(udev->bus);
- DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
+ DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
pipe, udev->address,
edesc->bEndpointAddress, udev->flags.usb2_mode,
- sc->sc_rt_addr);
+ sc->sc_rt_addr, udev->device_index);
if (udev->device_index == sc->sc_rt_addr) {
==== //depot/projects/usb/src/sys/dev/usb/controller/atmegadci.h#2 (text+ko) ====
@@ -155,6 +155,9 @@
#define ATMEGA_UHWCON 0xD7
#define ATMEGA_UHWCON_UVREGE (1 << 0)
+#define ATMEGA_UHWCON_UVCONE (1 << 4)
+#define ATMEGA_UHWCON_UIDE (1 << 6)
+#define ATMEGA_UHWCON_UIMOD (1 << 7)
#define ATMEGA_READ_1(sc, reg) \
bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
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