PERFORCE change 126957 for review
Warner Losh
imp at FreeBSD.org
Sat Sep 29 02:08:20 PDT 2007
http://perforce.freebsd.org/chv.cgi?CH=126957
Change 126957 by imp at imp_paco-paco on 2007/09/29 09:08:11
Get orion obio stuff building.
Affected files ...
.. //depot/projects/arm/src/sys/arm/orion/orion.c#2 edit
.. //depot/projects/arm/src/sys/arm/orion/orionvar.h#1 add
Differences ...
==== //depot/projects/arm/src/sys/arm/orion/orion.c#2 (text+ko) ====
@@ -1,0 +1,439 @@
+/*-
+ * Copyright (c) 2005 Olivier Houchard. All rights reserved.
+ * Copyright (c) 2007 Warner Losh. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/obio.h>
+
+#include <vm/vm.h>
+#include <vm/vm_kern.h>
+#include <vm/pmap.h>
+#include <vm/vm_page.h>
+#include <vm/vm_extern.h>
+
+#define _ARM32_BUS_DMA_PRIVATE
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <arm/orion/orionvar.h>
+
+static struct orion_softc *orion_softc;
+
+static int
+orion_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
+ bus_space_handle_t *bshp)
+{
+ vm_paddr_t pa, endpa;
+
+ /*
+ * XXX The 0xd0000000 is a workaround for a AT91RM9200 issue
+ * XXX and likely shouldn't be brought forward.
+ */
+ pa = trunc_page(bpa);
+ if (pa >= 0xfff00000) {
+ *bshp = pa - 0xf0000000 + 0xd0000000;
+ return (0);
+ }
+ if (pa >= 0xdff00000)
+ return (0);
+ endpa = round_page(bpa + size);
+
+ *bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
+
+ return (0);
+}
+
+static void
+orion_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
+{
+ vm_offset_t va, endva;
+
+ va = trunc_page((vm_offset_t)t);
+ endva = va + round_page(size);
+
+ /* Free the kernel virtual mapping. */
+ kmem_free(kernel_map, va, endva - va);
+}
+
+static int
+orion_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
+ bus_size_t size, bus_space_handle_t *nbshp)
+{
+
+ *nbshp = bsh + offset;
+ return (0);
+}
+
+static void
+orion_barrier(void *t, bus_space_handle_t bsh, bus_size_t size, bus_size_t b,
+ int a)
+{
+}
+
+bs_protos(generic);
+bs_protos(generic_armv4);
+
+/* XXX likely need to use generic_armv5 in places */
+
+struct bus_space orion_bs_tag = {
+ /* cookie */
+ (void *) 0,
+
+ /* mapping/unmapping */
+ orion_bs_map,
+ orion_bs_unmap,
+ orion_bs_subregion,
+
+ /* allocation/deallocation */
+ NULL,
+ NULL,
+
+ /* barrier */
+ orion_barrier,
+
+ /* read (single) */
+ generic_bs_r_1,
+ generic_armv4_bs_r_2,
+ generic_bs_r_4,
+ NULL,
+
+ /* read multiple */
+ generic_bs_rm_1,
+ generic_armv4_bs_rm_2,
+ generic_bs_rm_4,
+ NULL,
+
+ /* read region */
+ generic_bs_rr_1,
+ generic_armv4_bs_rr_2,
+ generic_bs_rr_4,
+ NULL,
+
+ /* write (single) */
+ generic_bs_w_1,
+ generic_armv4_bs_w_2,
+ generic_bs_w_4,
+ NULL,
+
+ /* write multiple */
+ generic_bs_wm_1,
+ generic_armv4_bs_wm_2,
+ generic_bs_wm_4,
+ NULL,
+
+ /* write region */
+ NULL,
+ generic_armv4_bs_wr_2,
+ generic_bs_wr_4,
+ NULL,
+
+ /* set multiple */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+
+ /* set region */
+ NULL,
+ generic_armv4_bs_sr_2,
+ generic_bs_sr_4,
+ NULL,
+
+ /* copy */
+ NULL,
+ generic_armv4_bs_c_2,
+ NULL,
+ NULL,
+};
+
+static int
+orion_probe(device_t dev)
+{
+ device_set_desc(dev, "ORION device bus");
+ return (0);
+}
+
+static void
+orion_identify(driver_t *drv, device_t parent)
+{
+
+ BUS_ADD_CHILD(parent, 0, "orion", 0);
+}
+
+struct arm32_dma_range *
+bus_dma_get_range(void)
+{
+
+ return (NULL);
+}
+
+int
+bus_dma_get_range_nb(void)
+{
+ return (0);
+}
+
+extern void irq_entry(void);
+
+static void
+orion_add_child(device_t dev, int prio, const char *name, int unit,
+ bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2)
+{
+ device_t kid;
+ struct orion_ivar *ivar;
+
+ kid = device_add_child_ordered(dev, prio, name, unit);
+ if (kid == NULL) {
+ printf("Can't add child %s%d ordered\n", name, unit);
+ return;
+ }
+ ivar = malloc(sizeof(*ivar), M_DEVBUF, M_WAITOK | M_ZERO);
+ if (ivar == NULL) {
+ device_delete_child(dev, kid);
+ printf("Can't add alloc ivar\n");
+ return;
+ }
+ device_set_ivars(kid, ivar);
+ resource_list_init(&ivar->obio.resources);
+ if (irq0 != -1)
+ bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1);
+ if (irq1 != 0)
+ bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1);
+ if (irq2 != 0)
+ bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1);
+ if (addr != 0)
+ bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
+}
+
+struct cpu_devs
+{
+ const char *name;
+ int unit;
+ bus_addr_t mem_base;
+ bus_size_t mem_len;
+ int irq0;
+ int irq1;
+ int irq2;
+};
+
+struct cpu_devs orion2_devs[] =
+{
+ { 0, 0, 0, 0, 0 }
+};
+
+static void
+orion_cpu_add_builtin_children(device_t dev, struct orion_softc *sc)
+{
+ int i;
+ struct cpu_devs *walker;
+
+ for (i = 0, walker = orion2_devs; walker->name; i++, walker++) {
+ orion_add_child(dev, i, walker->name, walker->unit,
+ walker->mem_base, walker->mem_len, walker->irq0,
+ walker->irq1, walker->irq2);
+ }
+}
+
+#define NORMDEV 50
+
+static int
+orion_attach(device_t dev)
+{
+ struct orion_softc *sc = device_get_softc(dev);
+/* int i; */
+
+ orion_softc = sc;
+ sc->obio.sc_bt = &orion_bs_tag;
+ sc->sc_st = &orion_bs_tag;
+ sc->obio.dev = dev;
+#if 0 /* XXX really important */
+ sc->sc_sh = ORION2_BASE;
+ if (bus_space_subregion(sc->sc_st, sc->sc_sh, ORION2_SYS_BASE,
+ ORION2_SYS_SIZE, &sc->sc_sys_sh) != 0)
+ panic("Enable to map IRQ registers");
+#endif
+ sc->obio.sc_irq_rman.rm_type = RMAN_ARRAY;
+ sc->obio.sc_irq_rman.rm_descr = "ORION IRQs";
+ sc->obio.sc_mem_rman.rm_type = RMAN_ARRAY;
+ sc->obio.sc_mem_rman.rm_descr = "ORION Memory";
+ if (rman_init(&sc->obio.sc_irq_rman) != 0 ||
+ rman_manage_region(&sc->obio.sc_irq_rman, 1, 31) != 0)
+ panic("orion_attach: failed to set up IRQ rman");
+/* XXX 0xd0000000 again */
+ if (rman_init(&sc->obio.sc_mem_rman) != 0 ||
+ rman_manage_region(&sc->obio.sc_mem_rman, 0xdff00000ul,
+ 0xdffffffful) != 0)
+ panic("orion_attach: failed to set up memory rman");
+#if 0
+ if (rman_manage_region(&sc->obio.sc_mem_rman, ORIONRM92_OHCI_BASE,
+ ORIONRM92_OHCI_BASE + ORIONRM92_OHCI_SIZE - 1) != 0)
+ panic("orion_attach: failed to set up ohci memory");
+#endif
+
+#if 0
+ for (i = 0; i < 32; i++) {
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SVR +
+ i * 4, i);
+ /* Priority. */
+ /* XXX: Give better priorities to IRQs */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SMR + i * 4,
+ 0);
+ if (i < 8)
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_EOICR,
+ 1);
+
+ }
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SPU, 32);
+ /* No debug. */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_DCR, 0);
+ /* Disable and clear all interrupts. */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff);
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff);
+
+ /* XXX */
+ /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
+ /* DIsable all interrupts for DBGU */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff);
+ /* Disable all interrupts for the SDRAM controller */
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
+#endif
+ orion_cpu_add_builtin_children(dev, sc);
+
+ bus_generic_probe(dev);
+ bus_generic_attach(dev);
+ enable_interrupts(I32_bit | F32_bit);
+ return (0);
+}
+
+static int
+orion_setup_intr(device_t dev, device_t child,
+ struct resource *ires, int flags, driver_filter_t *filt,
+ driver_intr_t *intr, void *arg, void **cookiep)
+{
+#if 0 /* AT91RM9200 had fast restrictions */
+ struct orion_softc *sc = device_get_softc(dev);
+
+ if (rman_get_start(ires) == ORIONRM92_IRQ_SYSTEM && filt == NULL)
+ panic("All system interrupt ISRs must be FILTER");
+#endif
+ BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt,
+ intr, arg, cookiep);
+#if 0
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IECR,
+ 1 << rman_get_start(ires));
+#endif
+ return (0);
+}
+
+static int
+orion_teardown_intr(device_t dev, device_t child, struct resource *res,
+ void *cookie)
+{
+#if 0
+ struct orion_softc *sc = device_get_softc(dev);
+
+ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR,
+ 1 << rman_get_start(res));
+#endif
+ return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
+}
+
+void
+arm_mask_irq(uintptr_t nb)
+{
+#if 0
+ bus_space_write_4(orion_softc->sc_st,
+ orion_softc->sc_sys_sh, IC_IDCR, 1 << nb);
+#endif
+}
+
+int
+arm_get_next_irq()
+{
+#if 0
+ int status;
+ int irq;
+
+ irq = bus_space_read_4(orion_softc->sc_st,
+ orion_softc->sc_sys_sh, IC_IVR);
+ status = bus_space_read_4(orion_softc->sc_st,
+ orion_softc->sc_sys_sh, IC_ISR);
+ if (status == 0) {
+ bus_space_write_4(orion_softc->sc_st,
+ orion_softc->sc_sys_sh, IC_EOICR, 1);
+ return (-1);
+ }
+ return (irq);
+#else
+ return (-1);
+#endif
+}
+
+void
+arm_unmask_irq(uintptr_t nb)
+{
+#if 0
+ bus_space_write_4(orion_softc->sc_st,
+ orion_softc->sc_sys_sh, IC_IECR, 1 << nb);
+ bus_space_write_4(orion_softc->sc_st, orion_softc->sc_sys_sh,
+ IC_EOICR, 0);
+#endif
+}
+
+static device_method_t orion_methods[] = {
+ DEVMETHOD(device_probe, orion_probe),
+ DEVMETHOD(device_attach, orion_attach),
+ DEVMETHOD(device_identify, orion_identify),
+
+ DEVMETHOD(bus_alloc_resource, obio_alloc_resource),
+ DEVMETHOD(bus_setup_intr, orion_setup_intr),
+ DEVMETHOD(bus_teardown_intr, orion_teardown_intr),
+ DEVMETHOD(bus_activate_resource, obio_activate_resource),
+ DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
+ DEVMETHOD(bus_get_resource_list,obio_get_resource_list),
+ DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
+ DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
+ DEVMETHOD(bus_release_resource, obio_release_resource),
+ DEVMETHOD(bus_print_child, obio_print_child),
+
+ {0, 0},
+};
+
+static driver_t orion_driver = {
+ "orion",
+ orion_methods,
+ sizeof(struct orion_softc),
+};
+static devclass_t orion_devclass;
+
+DRIVER_MODULE(orion, nexus, orion_driver, orion_devclass, 0, 0);
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