PERFORCE change 119603 for review

[Bruce M Simpson]

http://perforce.freebsd.org/chv.cgi?CH=119603

Change 119603 by bms at bms_anglepoise on 2007/05/09 22:22:17

	add irq allocations; currently hardwired on sentry5.
	interrupts are not routed yet.

Affected files ...

.. //depot/projects/mips2/src/sys/mips/mips32/sentry5/siba.c#7 edit

Differences ...

==== //depot/projects/mips2/src/sys/mips/mips32/sentry5/siba.c#7 (text+ko) ====

@@ -103,6 +103,7 @@
 		siba_dev_match(uint16_t, uint16_t, uint8_t);
 static struct resource_list *
 		siba_get_reslist(device_t, device_t);
+static uint8_t	siba_getirq(uint16_t);
 static uint8_t	siba_getncores(uint16_t);
 static int	siba_print_all_resources(device_t dev);
 static int	siba_print_child(device_t, device_t);
@@ -137,6 +138,49 @@
 	return (ncores);
 }
 
+/*
+ * On the Sentry5, the system bus IRQs are the same as the
+ * MIPS IRQs. Particular cores are hardwired to certain IRQ lines.
+ */
+static uint8_t
+siba_getirq(uint16_t devid)
+{
+	uint8_t irq;
+
+	switch (devid) {
+	case SIBA_DEVID_CHIPCOMMON:
+		irq = 0;
+		break;
+	case SIBA_DEVID_ETHERNET:
+		irq = 1;
+		break;
+	case SIBA_DEVID_IPSEC:
+		irq = 2;
+		break;
+	case SIBA_DEVID_USB:
+		irq = 3;
+		break;
+	case SIBA_DEVID_PCI:
+		irq = 4;
+		break;
+#if 0
+	/*
+	 * 5 is reserved for the MIPS on-chip timer interrupt;
+	 * it is hard-wired by the tick driver.
+	 */
+	case SIBA_DEVID_MIPS:
+	case SIBA_DEVID_MIPS_3302:
+		irq = 5;
+		break;
+#endif
+	default:
+		irq = 0xFF;	/* this core does not need an irq */
+		break;
+	}
+
+	return (irq);
+}
+
 static int
 siba_probe(device_t dev)
 {
@@ -409,7 +453,7 @@
 	 * Pass the request to the parent, usually MIPS nexus.
 	 */
 	if (siba_debug)
-		printf("%s: passing to parent", __func__);
+		printf("%s: proxying request to parent\n", __func__);
 	return (resource_list_alloc(rl, bus, child, type, rid,
 	    start, end, count, flags));
 }
@@ -434,6 +478,7 @@
 	struct siba_devinfo *sdi;
 	uint32_t idlo, idhi, rev;
 	uint16_t vendorid, devid;
+	bus_addr_t baseaddr;
 
 	sdi = malloc(sizeof(*sdi), M_DEVBUF, M_WAITOK | M_ZERO);
 	resource_list_init(&sdi->sdi_rl);
@@ -450,14 +495,20 @@
 	sdi->sdi_devid = devid;
 	sdi->sdi_rev = rev;
 	sdi->sdi_idx = idx;
-	sdi->sdi_irq = 0;	/* XXX notyet */
+	sdi->sdi_irq = siba_getirq(devid);
 
-	bus_addr_t baseaddr;
+	/*
+	 * Determine memory window on bus and irq if one is needed.
+	 */
 	baseaddr = sc->sc_maddr + (idx * SIBA_CORE_LEN);
 	resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY,
 	    MIPS_MEM_RID, /* XXX */
-	    baseaddr, baseaddr + SIBA_CORE_LEN - 1,
-	    SIBA_CORE_LEN);
+	    baseaddr, baseaddr + SIBA_CORE_LEN - 1, SIBA_CORE_LEN);
+
+	if (sdi->sdi_irq != 0xff) {
+		resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ,
+		    0, sdi->sdi_irq, sdi->sdi_irq, 1);
+	}
 
 	return (sdi);
 }