PERFORCE change 119124 for review

[Bruce M Simpson]

http://perforce.freebsd.org/chv.cgi?CH=119124

Change 119124 by bms at bms_anglepoise on 2007/05/01 21:22:36

	Teach tick how to grope around in the Malta virtual rtc hardware
	to estimate CPU clock frequency.
	This should hopefully help when booting on real hardware.

Affected files ...

.. //depot/projects/mips2/src/sys/conf/options.mips#4 edit
.. //depot/projects/mips2/src/sys/mips/mips/tick.c#9 edit

Differences ...

==== //depot/projects/mips2/src/sys/conf/options.mips#4 (text+ko) ====

@@ -7,3 +7,4 @@
 KERNVIRTADDR	opt_global.h
 PHYSADDR	opt_global.h
 TICK_USE_YAMON_FREQ	opt_global.h
+TICK_USE_MALTA_RTC	opt_global.h

==== //depot/projects/mips2/src/sys/mips/mips/tick.c#9 (text+ko) ====

@@ -52,6 +52,11 @@
 #ifdef TICK_USE_YAMON_FREQ
 #include <mips/mips4k/malta/yamon.h>
 #endif
+#ifdef TICK_USE_MALTA_RTC
+#include <mips/mips4k/malta/maltareg.h>
+#include <dev/mc146818/mc146818reg.h>
+#include <isa/rtc.h>
+#endif
 
 uint64_t	counter_freq;
 uint64_t	counts_per_hz;
@@ -76,6 +81,28 @@
 	800,			/* quality (adjusted in code) */
 };
 
+#ifdef TICK_USE_MALTA_RTC
+static __inline uint8_t
+rtcin(uint8_t addr)
+{
+
+	*((volatile uint8_t *)
+	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
+	return (*((volatile uint8_t *)
+	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))));
+}
+
+static __inline void
+writertc(uint8_t addr, uint8_t val)
+{
+
+	*((volatile uint8_t *)
+	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
+	*((volatile uint8_t *)
+	    MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val;
+}
+#endif
+
 static uint64_t
 tick_ticker(void)
 {
@@ -87,8 +114,7 @@
 tick_init_params(void)
 {
 
-	if (bootverbose)
-		printf("Calibrating MIPS32 clock ... ");
+	printf("Calibrating MIPS32 clock ... ");
 
 	do {
 #ifdef TICK_USE_YAMON_FREQ
@@ -106,14 +132,24 @@
 			counter_freq = strtol(cp, (char **)NULL, 10) * 1000 ;
 		}
 #else
+		u_int64_t counterval[2];
+
 		/*
 		 * Determine clock frequency from hardware.
-		 * XXX: Requires a working DELAY() macro.
 		 */
-		u_int64_t counterval[2];
+		counterval[0] = mips_rd_count();
+
+#ifdef TICK_USE_MALTA_RTC
+		/* Set RTC to binary mode. */
+		writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD));
+
+		/* Busy-wait for falling edge of RTC update. */
+		while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
+			;
+		while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
+			;
+#endif
 
-		counterval[0] = mips_rd_count();
-		DELAY(1000000);
 		counterval[1] = mips_rd_count();
 		counter_freq = counterval[1] - counterval[0];
 #endif
@@ -122,8 +158,7 @@
 	counts_per_hz = counter_freq / hz;
 	counts_per_usec = counter_freq / 1000000;
 
-	if (bootverbose)
-		printf("MIPS32 clock: %ju Hz\n", (intmax_t)counter_freq);
+	printf("MIPS32 clock: %ju Hz\n", (intmax_t)counter_freq);
 
 	set_cputicker(tick_ticker, counter_freq, 1);
 }