PERFORCE change 121132 for review
Paolo Pisati
piso at FreeBSD.org
Thu Jun 7 08:10:34 UTC 2007
http://perforce.freebsd.org/chv.cgi?CH=121132
Change 121132 by piso at piso_skytech on 2007/06/07 08:09:40
IFC at 121131
Affected files ...
.. //depot/projects/soc2006/intr_filter/arm/include/pcpu.h#4 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/ah_osdep.c#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/ah_osdep.h#2 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/ath_rate/onoe/onoe.c#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/ath_rate/onoe/onoe.h#2 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/if_ath.c#17 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/if_ath_pci.c#7 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/if_athioctl.h#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/if_athrate.h#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/ath/if_athvar.h#12 integrate
.. //depot/projects/soc2006/intr_filter/dev/bce/if_bce.c#16 integrate
.. //depot/projects/soc2006/intr_filter/dev/bce/if_bcereg.h#7 integrate
.. //depot/projects/soc2006/intr_filter/dev/de/if_de.c#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/firewire.c#6 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/firewirereg.h#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwdev.c#6 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwdma.c#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwmem.c#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwohci.c#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwohci_pci.c#7 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/fwohcivar.h#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/if_fwe.c#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/if_fwevar.h#2 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/if_fwip.c#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/if_fwipvar.h#2 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/sbp.c#7 integrate
.. //depot/projects/soc2006/intr_filter/dev/firewire/sbp_targ.c#6 integrate
.. //depot/projects/soc2006/intr_filter/dev/mii/brgphy.c#11 integrate
.. //depot/projects/soc2006/intr_filter/dev/mii/brgphyreg.h#3 integrate
.. //depot/projects/soc2006/intr_filter/dev/mii/miidevs#10 integrate
.. //depot/projects/soc2006/intr_filter/dev/puc/puc.c#16 integrate
.. //depot/projects/soc2006/intr_filter/dev/puc/pucdata.c#5 integrate
.. //depot/projects/soc2006/intr_filter/dev/usb/uftdi.c#5 integrate
.. //depot/projects/soc2006/intr_filter/ia64/ia64/machdep.c#10 integrate
.. //depot/projects/soc2006/intr_filter/netinet/ip_carp.c#6 integrate
.. //depot/projects/soc2006/intr_filter/netinet/tcp_syncache.c#12 integrate
.. //depot/projects/soc2006/intr_filter/pc98/pc98/machdep.c#12 integrate
.. //depot/projects/soc2006/intr_filter/sparc64/fhc/fhc.c#11 integrate
.. //depot/projects/soc2006/intr_filter/sparc64/pci/psycho.c#17 integrate
.. //depot/projects/soc2006/intr_filter/sparc64/sbus/sbus.c#15 integrate
.. //depot/projects/soc2006/intr_filter/sys/param.h#14 integrate
Differences ...
==== //depot/projects/soc2006/intr_filter/arm/include/pcpu.h#4 (text+ko) ====
@@ -24,7 +24,7 @@
* SUCH DAMAGE.
*
* from: FreeBSD: src/sys/i386/include/globaldata.h,v 1.27 2001/04/27
- * $FreeBSD: src/sys/arm/include/pcpu.h,v 1.5 2007/06/04 21:38:45 attilio Exp $
+ * $FreeBSD: src/sys/arm/include/pcpu.h,v 1.6 2007/06/06 23:23:47 jeff Exp $
*/
#ifndef _MACHINE_PCPU_H_
@@ -58,7 +58,7 @@
* with respect to preemption.
*/
#define PCPU_ADD(member, value) (__pcpu.pc_ ## member += (value))
-#define PCPU_INC(member) PCPU_LAZY_ADD(member, 1)
+#define PCPU_INC(member) PCPU_ADD(member, 1)
#define PCPU_PTR(member) (&__pcpu.pc_ ## member)
#define PCPU_SET(member,value) (__pcpu.pc_ ## member = (value))
==== //depot/projects/soc2006/intr_filter/dev/ath/ah_osdep.c#3 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -33,7 +26,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/ah_osdep.c,v 1.2 2007/04/10 15:48:45 rwatson Exp $
+ * $FreeBSD: src/sys/dev/ath/ah_osdep.c,v 1.3 2007/06/06 15:49:15 sam Exp $
*/
#include "opt_ah.h"
==== //depot/projects/soc2006/intr_filter/dev/ath/ah_osdep.h#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -33,7 +26,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/ah_osdep.h,v 1.1 2006/09/18 16:49:14 sam Exp $
+ * $FreeBSD: src/sys/dev/ath/ah_osdep.h,v 1.2 2007/06/06 15:49:15 sam Exp $
*/
#ifndef _ATH_AH_OSDEP_H_
#define _ATH_AH_OSDEP_H_
==== //depot/projects/soc2006/intr_filter/dev/ath/ath_rate/onoe/onoe.c#3 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -35,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ath/ath_rate/onoe/onoe.c,v 1.12 2006/12/13 19:34:35 sam Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ath/ath_rate/onoe/onoe.c,v 1.13 2007/06/06 15:49:16 sam Exp $");
/*
* Atsushi Onoe's rate control algorithm.
==== //depot/projects/soc2006/intr_filter/dev/ath/ath_rate/onoe/onoe.h#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -7,19 +7,12 @@
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer,
- without modification.
+ * without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -33,7 +26,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/ath_rate/onoe/onoe.h,v 1.2 2004/12/31 22:41:45 sam Exp $
+ * $FreeBSD: src/sys/dev/ath/ath_rate/onoe/onoe.h,v 1.3 2007/06/06 15:49:16 sam Exp $
*/
/*
==== //depot/projects/soc2006/intr_filter/dev/ath/if_ath.c#17 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -35,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.169 2007/06/03 02:16:48 sam Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.170 2007/06/06 15:49:15 sam Exp $");
/*
* Driver for the Atheros Wireless LAN controller.
==== //depot/projects/soc2006/intr_filter/dev/ath/if_ath_pci.c#7 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -35,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.18 2007/02/23 12:18:33 piso Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.19 2007/06/06 15:49:15 sam Exp $");
/*
* PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
==== //depot/projects/soc2006/intr_filter/dev/ath/if_athioctl.h#5 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -33,7 +26,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/if_athioctl.h,v 1.17 2006/08/10 16:31:37 sam Exp $
+ * $FreeBSD: src/sys/dev/ath/if_athioctl.h,v 1.18 2007/06/06 15:49:15 sam Exp $
*/
/*
==== //depot/projects/soc2006/intr_filter/dev/ath/if_athrate.h#3 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2004-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2004-2007 Sam Leffler, Errno Consulting
* Copyright (c) 2004 Video54 Technologies, Inc.
* All rights reserved.
*
@@ -8,19 +8,12 @@
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer,
- without modification.
+ * without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -34,7 +27,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/if_athrate.h,v 1.5 2006/12/13 19:34:34 sam Exp $
+ * $FreeBSD: src/sys/dev/ath/if_athrate.h,v 1.6 2007/06/06 15:49:15 sam Exp $
*/
#ifndef _ATH_RATECTRL_H_
#define _ATH_RATECTRL_H_
==== //depot/projects/soc2006/intr_filter/dev/ath/if_athvar.h#12 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,7 @@
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
- * 3. Neither the names of the above-listed copyright holders nor the names
- * of any contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- *
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@@ -33,7 +26,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.60 2007/03/05 21:56:33 sam Exp $
+ * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.61 2007/06/06 15:49:15 sam Exp $
*/
/*
==== //depot/projects/soc2006/intr_filter/dev/bce/if_bce.c#16 (text) ====
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.31 2007/05/16 23:34:11 davidch Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.32 2007/06/07 02:23:56 davidch Exp $");
/*
* The following controllers are supported by this driver:
@@ -109,7 +109,7 @@
/* BCM5708S controllers and OEM boards. */
{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S, PCI_ANY_ID, PCI_ANY_ID,
- "Broadcom NetXtreme II BCM5708S 1000Base-T" },
+ "Broadcom NetXtreme II BCM5708 1000Base-SX" },
{ 0, 0, 0, 0, NULL }
};
@@ -359,25 +359,25 @@
DRIVER_MODULE(bce, pci, bce_driver, bce_devclass, 0, 0);
DRIVER_MODULE(miibus, bce, miibus_driver, miibus_devclass, 0, 0);
-
-
+
+
/****************************************************************************/
/* Tunable device values */
/****************************************************************************/
-static int bce_tso_enable = TRUE;
+static int bce_tso_enable = TRUE;
static int bce_msi_enable = 1;
-
-/* Allowable values are TRUE or FALSE */
-TUNABLE_INT("hw.bce.tso_enable", &bce_tso_enable);
+
+/* Allowable values are TRUE or FALSE */
+TUNABLE_INT("hw.bce.tso_enable", &bce_tso_enable);
/* Allowable values are 0 (IRQ only) and 1 (IRQ or MSI) */
TUNABLE_INT("hw.bce.msi_enable", &bce_msi_enable);
-SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD, 0, "bce driver parameters");
-SYSCTL_UINT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
+SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD, 0, "bce driver parameters");
+SYSCTL_UINT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
"TSO Enable/Disable");
-SYSCTL_UINT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
+SYSCTL_UINT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
"MSI | INTx selector");
-
+
/****************************************************************************/
/* Device probe function. */
/* */
@@ -468,7 +468,7 @@
DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
mbuf = device_get_unit(dev);
-
+
/* Set initial device and PHY flags */
sc->bce_flags = 0;
sc->bce_phy_flags = 0;
@@ -494,19 +494,19 @@
sc->bce_bhandle = rman_get_bushandle(sc->bce_res_mem);
sc->bce_vhandle = (vm_offset_t) rman_get_virtual(sc->bce_res_mem);
- /* If MSI is enabled in the driver, get the vector count. */
- count = bce_msi_enable ? pci_msi_count(dev) : 0;
-
+ /* If MSI is enabled in the driver, get the vector count. */
+ count = bce_msi_enable ? pci_msi_count(dev) : 0;
+
/* Allocate PCI IRQ resources. */
if (count == 1 && pci_alloc_msi(dev, &count) == 0 && count == 1) {
rid = 1;
sc->bce_flags |= BCE_USING_MSI_FLAG;
DBPRINT(sc, BCE_INFO, "Allocating %d MSI interrupt(s).\n", count);
} else {
- rid = 0;
+ rid = 0;
DBPRINT(sc, BCE_INFO, "Allocating IRQ interrupt.\n");
}
-
+
sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
RF_SHAREABLE | RF_ACTIVE);
@@ -632,7 +632,7 @@
/* Initialize the controller. */
if (bce_chipinit(sc)) {
BCE_PRINTF("%s(%d): Controller initialization failed!\n",
- __FILE__, __LINE__);
+ __FILE__, __LINE__);
rc = ENXIO;
goto bce_attach_fail;
}
@@ -684,25 +684,33 @@
sc->bce_stats_ticks = 1000000 & 0xffff00;
/*
- * The copper based NetXtreme II controllers
- * use an integrated PHY at address 1 while
- * the SerDes controllers use a PHY at
- * address 2.
+ * The SerDes based NetXtreme II controllers
+ * that support 2.5Gb operation (currently
+ * 5708S) use a PHY at address 2, otherwise
+ * the PHY is present at address 1.
*/
sc->bce_phy_addr = 1;
if (BCE_CHIP_BOND_ID(sc) & BCE_CHIP_BOND_ID_SERDES_BIT) {
sc->bce_phy_flags |= BCE_PHY_SERDES_FLAG;
sc->bce_flags |= BCE_NO_WOL_FLAG;
- if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5708) {
+ if (BCE_CHIP_NUM(sc) != BCE_CHIP_NUM_5706) {
sc->bce_phy_addr = 2;
val = REG_RD_IND(sc, sc->bce_shmem_base +
BCE_SHARED_HW_CFG_CONFIG);
- if (val & BCE_SHARED_HW_CFG_PHY_2_5G)
+ if (val & BCE_SHARED_HW_CFG_PHY_2_5G) {
sc->bce_phy_flags |= BCE_PHY_2_5G_CAPABLE_FLAG;
+ DBPRINT(sc, BCE_WARN, "Found 2.5Gb capable adapter\n");
+ }
}
}
+ /* Store config data needed by the PHY driver for backplane applications */
+ sc->bce_shared_hw_cfg = REG_RD_IND(sc, sc->bce_shmem_base +
+ BCE_SHARED_HW_CFG_CONFIG);
+ sc->bce_port_hw_cfg = REG_RD_IND(sc, sc->bce_shmem_base +
+ BCE_SHARED_HW_CFG_CONFIG);
+
/* Allocate DMA memory resources. */
if (bce_dma_alloc(dev)) {
BCE_PRINTF("%s(%d): DMA resource allocation failed!\n",
@@ -728,14 +736,14 @@
ifp->if_start = bce_start;
ifp->if_init = bce_init;
ifp->if_mtu = ETHERMTU;
-
- if (bce_tso_enable) {
- ifp->if_hwassist = BCE_IF_HWASSIST | CSUM_TSO;
+
+ if (bce_tso_enable) {
+ ifp->if_hwassist = BCE_IF_HWASSIST | CSUM_TSO;
ifp->if_capabilities = BCE_IF_CAPABILITIES | IFCAP_TSO4;
- } else {
- ifp->if_hwassist = BCE_IF_HWASSIST;
- ifp->if_capabilities = BCE_IF_CAPABILITIES;
- }
+ } else {
+ ifp->if_hwassist = BCE_IF_HWASSIST;
+ ifp->if_capabilities = BCE_IF_CAPABILITIES;
+ }
ifp->if_capenable = ifp->if_capabilities;
@@ -747,9 +755,9 @@
ifp->if_snd.ifq_drv_maxlen = USABLE_TX_BD;
if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)
- ifp->if_baudrate = IF_Gbps(2.5);
+ ifp->if_baudrate = IF_Mbps(2500ULL);
else
- ifp->if_baudrate = IF_Gbps(1);
+ ifp->if_baudrate = IF_Mbps(1000);
IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
IFQ_SET_READY(&ifp->if_snd);
@@ -792,7 +800,7 @@
/* Get the firmware running so IPMI still works */
BCE_LOCK(sc);
bce_mgmt_init_locked(sc);
- BCE_UNLOCK(sc);
+ BCE_UNLOCK(sc);
goto bce_attach_exit;
@@ -1047,7 +1055,7 @@
/* Make sure we are accessing the correct PHY address. */
if (phy != sc->bce_phy_addr) {
- DBPRINT(sc, BCE_WARN, "Invalid PHY address %d for PHY write!\n", phy);
+ DBPRINT(sc, BCE_VERBOSE, "Invalid PHY address %d for PHY write!\n", phy);
return(0);
}
@@ -1111,71 +1119,61 @@
{
struct bce_softc *sc;
struct mii_data *mii;
+ int val;
sc = device_get_softc(dev);
mii = device_get_softc(sc->bce_miibus);
- DBPRINT(sc, BCE_INFO, "mii_media_active = 0x%08X\n",
- mii->mii_media_active);
-
-#ifdef BCE_DEBUG
- /* Decode the interface media flags. */
- BCE_PRINTF("Media: ( ");
- switch(IFM_TYPE(mii->mii_media_active)) {
- case IFM_ETHER: printf("Ethernet )");
- break;
- default: printf("Unknown )");
- }
-
- printf(" Media Options: ( ");
- switch(IFM_SUBTYPE(mii->mii_media_active)) {
- case IFM_AUTO: printf("Autoselect )"); break;
- case IFM_MANUAL: printf("Manual )"); break;
- case IFM_NONE: printf("None )"); break;
- case IFM_10_T: printf("10Base-T )"); break;
- case IFM_100_TX: printf("100Base-TX )"); break;
- case IFM_1000_SX: printf("1000Base-SX )"); break;
- case IFM_1000_T: printf("1000Base-T )"); break;
- default: printf("Other )");
- }
-
- printf(" Global Options: (");
- if (mii->mii_media_active & IFM_FDX)
- printf(" FullDuplex");
- if (mii->mii_media_active & IFM_HDX)
- printf(" HalfDuplex");
- if (mii->mii_media_active & IFM_LOOP)
- printf(" Loopback");
- if (mii->mii_media_active & IFM_FLAG0)
- printf(" Flag0");
- if (mii->mii_media_active & IFM_FLAG1)
- printf(" Flag1");
- if (mii->mii_media_active & IFM_FLAG2)
- printf(" Flag2");
- printf(" )\n");
-#endif
-
- BCE_CLRBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT);
+ val = REG_RD(sc, BCE_EMAC_MODE);
+ val &= ~(BCE_EMAC_MODE_PORT | BCE_EMAC_MODE_HALF_DUPLEX |
+ BCE_EMAC_MODE_MAC_LOOP | BCE_EMAC_MODE_FORCE_LINK |
+ BCE_EMAC_MODE_25G);
/* Set MII or GMII interface based on the speed negotiated by the PHY. */
- if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T ||
- IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) {
- DBPRINT(sc, BCE_INFO, "Setting GMII interface.\n");
- BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT_GMII);
- } else {
- DBPRINT(sc, BCE_INFO, "Setting MII interface.\n");
- BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT_MII);
+ switch (IFM_SUBTYPE(mii->mii_media_active)) {
+ case IFM_10_T:
+ if (BCE_CHIP_NUM(sc) != BCE_CHIP_NUM_5706) {
+ DBPRINT(sc, BCE_INFO, "Enabling 10Mb interface.\n");
+ val |= BCE_EMAC_MODE_PORT_MII_10;
+ break;
+ }
+ /* fall-through */
+ case IFM_100_TX:
+ DBPRINT(sc, BCE_INFO, "Enabling MII interface.\n");
+ val |= BCE_EMAC_MODE_PORT_MII;
+ break;
+ case IFM_2500_SX:
+ DBPRINT(sc, BCE_INFO, "Enabling 2.5G MAC mode.\n");
+ val |= BCE_EMAC_MODE_25G;
+ /* fall-through */
+ case IFM_1000_T:
+ case IFM_1000_SX:
+ DBPRINT(sc, BCE_INFO, "Enablinb GMII interface.\n");
+ val |= BCE_EMAC_MODE_PORT_GMII;
+ break;
+ default:
+ val |= BCE_EMAC_MODE_PORT_GMII;
}
/* Set half or full duplex based on the duplicity negotiated by the PHY. */
- if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
+ if ((mii->mii_media_active & IFM_GMASK) == IFM_HDX) {
+ DBPRINT(sc, BCE_INFO, "Setting Half-Duplex interface.\n");
+ val |= BCE_EMAC_MODE_HALF_DUPLEX;
+ } else
DBPRINT(sc, BCE_INFO, "Setting Full-Duplex interface.\n");
- BCE_CLRBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_HALF_DUPLEX);
- } else {
- DBPRINT(sc, BCE_INFO, "Setting Half-Duplex interface.\n");
- BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_HALF_DUPLEX);
- }
+
+ REG_WR(sc, BCE_EMAC_MODE, val);
+
+#if 0
+ /* Todo: Enable this support in brgphy and bge. */
+ /* FLAG0 is set if RX is enabled and FLAG1 if TX is enabled */
+ if (mii->mii_media_active & IFM_FLAG0)
+ BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_RX_MODE_FLOW_EN);
+ if (mii->mii_media_active & IFM_FLAG1)
+ BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_TX_MODE_FLOW_EN);
+#endif
+
}
@@ -2210,9 +2208,9 @@
{
struct bce_softc *sc;
int i, error, rc = 0;
- bus_addr_t busaddr;
- bus_size_t max_size, max_seg_size;
- int max_segments;
+ bus_addr_t busaddr;
+ bus_size_t max_size, max_seg_size;
+ int max_segments;
sc = device_get_softc(dev);
@@ -2404,17 +2402,17 @@
DBPRINT(sc, BCE_INFO, "tx_bd_chain_paddr[%d] = 0x%08X\n",
i, (u32) sc->tx_bd_chain_paddr[i]);
}
-
- /* Check the required size before mapping to conserve resources. */
- if (bce_tso_enable) {
- max_size = BCE_TSO_MAX_SIZE;
- max_segments = BCE_MAX_SEGMENTS;
- max_seg_size = BCE_TSO_MAX_SEG_SIZE;
- } else {
- max_size = MCLBYTES * BCE_MAX_SEGMENTS;
- max_segments = BCE_MAX_SEGMENTS;
- max_seg_size = MCLBYTES;
- }
+
+ /* Check the required size before mapping to conserve resources. */
+ if (bce_tso_enable) {
+ max_size = BCE_TSO_MAX_SIZE;
+ max_segments = BCE_MAX_SEGMENTS;
+ max_seg_size = BCE_TSO_MAX_SEG_SIZE;
+ } else {
+ max_size = MCLBYTES * BCE_MAX_SEGMENTS;
+ max_segments = BCE_MAX_SEGMENTS;
+ max_seg_size = MCLBYTES;
+ }
/* Create a DMA tag for TX mbufs. */
if (bus_dma_tag_create(sc->parent_tag,
@@ -2425,7 +2423,7 @@
NULL, NULL,
max_size,
max_segments,
- max_seg_size,
+ max_seg_size,
0,
NULL, NULL,
&sc->tx_mbuf_tag)) {
@@ -2562,31 +2560,31 @@
dev = sc->bce_dev;
bce_dma_free(sc);
-
- if (sc->bce_intrhand != NULL) {
+
+ if (sc->bce_intrhand != NULL) {
DBPRINT(sc, BCE_INFO_RESET, "Removing interrupt handler.\n");
- bus_teardown_intr(dev, sc->bce_res_irq, sc->bce_intrhand);
+ bus_teardown_intr(dev, sc->bce_res_irq, sc->bce_intrhand);
}
- if (sc->bce_res_irq != NULL) {
+ if (sc->bce_res_irq != NULL) {
DBPRINT(sc, BCE_INFO_RESET, "Releasing IRQ.\n");
- bus_release_resource(dev, SYS_RES_IRQ, sc->bce_flags & BCE_USING_MSI_FLAG ? 1 : 0,
+ bus_release_resource(dev, SYS_RES_IRQ, sc->bce_flags & BCE_USING_MSI_FLAG ? 1 : 0,
sc->bce_res_irq);
}
-
- if (sc->bce_flags & BCE_USING_MSI_FLAG) {
+
+ if (sc->bce_flags & BCE_USING_MSI_FLAG) {
DBPRINT(sc, BCE_INFO_RESET, "Releasing MSI vector.\n");
- pci_release_msi(dev);
- }
+ pci_release_msi(dev);
+ }
- if (sc->bce_res_mem != NULL) {
+ if (sc->bce_res_mem != NULL) {
DBPRINT(sc, BCE_INFO_RESET, "Releasing PCI memory.\n");
- bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->bce_res_mem);
+ bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->bce_res_mem);
}
- if (sc->bce_ifp != NULL) {
+ if (sc->bce_ifp != NULL) {
DBPRINT(sc, BCE_INFO_RESET, "Releasing IF.\n");
- if_free(sc->bce_ifp);
+ if_free(sc->bce_ifp);
}
if (mtx_initialized(&sc->bce_mtx))
@@ -3257,9 +3255,9 @@
/* Make sure the interrupt is not active. */
REG_WR(sc, BCE_PCICFG_INT_ACK_CMD, BCE_PCICFG_INT_ACK_CMD_MASK_INT);
- /*
+ /*
* Initialize DMA byte/word swapping, configure the number of DMA
- * channels and PCI clock compensation delay.
+ * channels and PCI clock compensation delay.
*/
val = BCE_DMA_CONFIG_DATA_BYTE_SWAP |
BCE_DMA_CONFIG_DATA_WORD_SWAP |
@@ -3322,7 +3320,7 @@
val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);
REG_WR(sc, BCE_MQ_KNL_BYP_WIND_START, val);
REG_WR(sc, BCE_MQ_KNL_WIND_END, val);
-
+
/* Set the page size and clear the RV2P processor stall bits. */
val = (BCM_PAGE_BITS - 8) << 24;
REG_WR(sc, BCE_RV2P_CONFIG, val);
@@ -3553,10 +3551,10 @@
DBRUNIF((sc->free_rx_bd > USABLE_RX_BD),
BCE_PRINTF("%s(%d): Too many free rx_bd (0x%04X > 0x%04X)!\n",
__FILE__, __LINE__, sc->free_rx_bd, (u16) USABLE_RX_BD));
-
+
/* Update some debug statistic counters */
DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
- sc->rx_low_watermark = sc->free_rx_bd);
+ sc->rx_low_watermark = sc->free_rx_bd);
DBRUNIF((sc->free_rx_bd == 0), sc->rx_empty_count++);
/* Setup the rx_bd for the first segment. */
@@ -3621,9 +3619,9 @@
sc->tx_prod = 0;
sc->tx_cons = 0;
sc->tx_prod_bseq = 0;
- sc->used_tx_bd = 0;
+ sc->used_tx_bd = 0;
sc->max_tx_bd = USABLE_TX_BD;
- DBRUNIF(1, sc->tx_hi_watermark = USABLE_TX_BD);
+ DBRUNIF(1, sc->tx_hi_watermark = USABLE_TX_BD);
DBRUNIF(1, sc->tx_full_count = 0);
/*
@@ -3733,9 +3731,9 @@
sc->rx_prod = 0;
sc->rx_cons = 0;
sc->rx_prod_bseq = 0;
- sc->free_rx_bd = USABLE_RX_BD;
- sc->max_rx_bd = USABLE_RX_BD;
- DBRUNIF(1, sc->rx_low_watermark = USABLE_RX_BD);
+ sc->free_rx_bd = USABLE_RX_BD;
+ sc->max_rx_bd = USABLE_RX_BD;
+ DBRUNIF(1, sc->rx_low_watermark = USABLE_RX_BD);
DBRUNIF(1, sc->rx_empty_count = 0);
/* Initialize the RX next pointer chain entries. */
@@ -3792,7 +3790,7 @@
}
/* Tell the chip about the waiting rx_bd's. */
- REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
+ REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
REG_WR(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
DBRUN(BCE_VERBOSE_RECV, bce_dump_rx_chain(sc, 0, TOTAL_RX_BD));
@@ -3858,7 +3856,7 @@
BCE_UNLOCK(sc);
return (0);
}
-
+
/****************************************************************************/
/* Set media options. */
@@ -3872,15 +3870,15 @@
struct bce_softc *sc;
struct mii_data *mii;
struct ifmedia *ifm;
-
+
sc = ifp->if_softc;
ifm = &sc->bce_ifmedia;
BCE_LOCK_ASSERT(sc);
mii = device_get_softc(sc->bce_miibus);
-
- /* Make sure the MII bus has been enumerated. */
- if (mii) {
+
+ /* Make sure the MII bus has been enumerated. */
+ if (mii) {
sc->bce_link = 0;
if (mii->mii_instance) {
struct mii_softc *miisc;
@@ -3888,7 +3886,7 @@
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
mii_phy_reset(miisc);
}
- mii_mediachg(mii);
+ mii_mediachg(mii);
}
}
@@ -4004,9 +4002,9 @@
bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
BUS_SPACE_BARRIER_READ);
- /* Update some debug statistics counters */
+ /* Update some debug statistics counters */
DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
- sc->rx_low_watermark = sc->free_rx_bd);
+ sc->rx_low_watermark = sc->free_rx_bd);
DBRUNIF((sc->free_rx_bd == 0), sc->rx_empty_count++);
/* Scan through the receive chain as long as there is work to do */
@@ -4016,9 +4014,9 @@
unsigned int len;
u32 status;
- /* Clear the mbuf pointer. */
- m = NULL;
-
+ /* Clear the mbuf pointer. */
+ m = NULL;
+
/* Convert the producer/consumer indices to an actual rx_bd index. */
sw_chain_cons = RX_CHAIN_IDX(sw_cons);
sw_chain_prod = RX_CHAIN_IDX(sw_prod);
@@ -4048,11 +4046,11 @@
__FILE__, __LINE__, sw_chain_cons);
bce_breakpoint(sc));
- /*
- * ToDo: If the received packet is small enough
+ /*
+ * ToDo: If the received packet is small enough
* to fit into a single, non-M_EXT mbuf,
- * allocate a new mbuf here, copy the data to
- * that mbuf, and recycle the mapped jumbo frame.
+ * allocate a new mbuf here, copy the data to
+ * that mbuf, and recycle the mapped jumbo frame.
*/
/* Unmap the mbuf from DMA space. */
@@ -4212,30 +4210,30 @@
}
sw_cons = NEXT_RX_BD(sw_cons);
-
- /* If we have a packet, pass it up the stack */
- if (m) {
- /* Make sure we don't lose our place when we release the lock. */
- sc->rx_cons = sw_cons;
- sc->rx_prod = sw_prod;
- sc->rx_prod_bseq = sw_prod_bseq;
+
+ /* If we have a packet, pass it up the stack */
+ if (m) {
+ /* Make sure we don't lose our place when we release the lock. */
+ sc->rx_cons = sw_cons;
+ sc->rx_prod = sw_prod;
+ sc->rx_prod_bseq = sw_prod_bseq;
DBPRINT(sc, BCE_VERBOSE_RECV, "%s(): Passing received frame up.\n",
__FUNCTION__);
BCE_UNLOCK(sc);
(*ifp->if_input)(ifp, m);
DBRUNIF(1, sc->rx_mbuf_alloc--);
- BCE_LOCK(sc);
-
- /* Recover our place. */
- sw_cons = sc->rx_cons;
- sw_prod = sc->rx_prod;
- sw_prod_bseq = sc->rx_prod_bseq;
- hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
- if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
- hw_cons++;
- }
-
+ BCE_LOCK(sc);
+
+ /* Recover our place. */
+ sw_cons = sc->rx_cons;
+ sw_prod = sc->rx_prod;
+ sw_prod_bseq = sc->rx_prod_bseq;
+ hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
+ if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
+ hw_cons++;
+ }
+
/* Refresh hw_cons to see if there's new work */
if (sw_cons == hw_cons) {
hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
@@ -4372,7 +4370,7 @@
/* Clear the tx hardware queue full flag. */
if (sc->used_tx_bd < sc->max_tx_bd) {
DBRUNIF((ifp->if_drv_flags & IFF_DRV_OACTIVE),
- DBPRINT(sc, BCE_WARN_SEND,
+ DBPRINT(sc, BCE_WARN_SEND,
"%s(): Open TX chain! %d/%d (used/total)\n",
__FUNCTION__, sc->used_tx_bd, sc->max_tx_bd));
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
@@ -4530,9 +4528,9 @@
return;
}
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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