PERFORCE change 124262 for review
Christopher Davis
loafier at FreeBSD.org
Sat Jul 28 14:47:35 UTC 2007
http://perforce.freebsd.org/chv.cgi?CH=124262
Change 124262 by loafier at chrisdsoc on 2007/07/28 14:47:04
Edited for bus_alloc_resources(), etc
Affected files ...
.. //depot/projects/soc2007/loafier_busalloc/src/sys/dev/sound/pci/ich.c#2 edit
Differences ...
==== //depot/projects/soc2007/loafier_busalloc/src/sys/dev/sound/pci/ich.c#2 (text+ko) ====
@@ -167,6 +167,27 @@
bus_addr_t desc_addr;
};
+enum {
+ RES_NAMBAR,
+ RES_NABMBAR,
+ RES_IRQ,
+ RES_SZ
+};
+
+static struct resource_spec ich_res_spec_mem[] = {
+ {SYS_RES_MEMORY, PCIR_MMBAR, RF_ACTIVE},
+ {SYS_RES_MEMORY, PCIR_MBBAR, RF_ACTIVE},
+ {SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
+ {-1, 0, 0}
+};
+
+static struct resource_spec ich_res_spec_io[] = {
+ {SYS_RES_IOPORT, PCIR_NAMBAR, RF_ACTIVE},
+ {SYS_RES_IOPORT, PCIR_NABMBAR, RF_ACTIVE},
+ {SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
+ {-1, 0, 0}
+};
+
/* device private data */
struct sc_info {
device_t dev;
@@ -174,10 +195,8 @@
unsigned int chnum, bufsz, blkcnt;
int sample_size, swap_reg;
- struct resource *nambar, *nabmbar, *irq;
- int regtype, nambarid, nabmbarid, irqid;
- bus_space_tag_t nambart, nabmbart;
- bus_space_handle_t nambarh, nabmbarh;
+ struct resource *res[RES_SZ];
+ struct resource_spec *spec;
bus_dma_tag_t dmat, chan_dmat;
bus_dmamap_t dtmap;
void *ih;
@@ -206,37 +225,16 @@
/* -------------------------------------------------------------------- */
/* Hardware */
-static __inline uint32_t
-ich_rd(struct sc_info *sc, int regno, int size)
-{
- switch (size) {
- case 1:
- return (bus_space_read_1(sc->nabmbart, sc->nabmbarh, regno));
- case 2:
- return (bus_space_read_2(sc->nabmbart, sc->nabmbarh, regno));
- case 4:
- return (bus_space_read_4(sc->nabmbart, sc->nabmbarh, regno));
- default:
- return (0xffffffff);
- }
-}
+#define ich_rd1(_sc, _reg) bus_read_1((_sc)->res[RES_NABMBAR], _reg)
+#define ich_rd2(_sc, _reg) bus_read_2((_sc)->res[RES_NABMBAR], _reg)
+#define ich_rd4(_sc, _reg) bus_read_4((_sc)->res[RES_NABMBAR], _reg)
+#define ich_wr1(_sc, _reg, _val) \
+ bus_write_1((_sc)->res[RES_NABMBAR], _reg, _val)
+#define ich_wr2(_sc, _reg, _val) \
+ bus_write_2((_sc)->res[RES_NABMBAR], _reg, _val)
+#define ich_wr4(_sc, _reg, _val) \
+ bus_write_4((_sc)->res[RES_NABMBAR], _reg, _val)
-static __inline void
-ich_wr(struct sc_info *sc, int regno, uint32_t data, int size)
-{
- switch (size) {
- case 1:
- bus_space_write_1(sc->nabmbart, sc->nabmbarh, regno, data);
- break;
- case 2:
- bus_space_write_2(sc->nabmbart, sc->nabmbarh, regno, data);
- break;
- case 4:
- bus_space_write_4(sc->nabmbart, sc->nabmbarh, regno, data);
- break;
- }
-}
-
/* ac97 codec */
static int
ich_waitcd(void *devinfo)
@@ -246,7 +244,7 @@
int i;
for (i = 0; i < ICH_TIMEOUT; i++) {
- data = ich_rd(sc, ICH_REG_ACC_SEMA, 1);
+ data = ich_rd1(sc, ICH_REG_ACC_SEMA);
if ((data & 0x01) == 0)
return (0);
DELAY(1);
@@ -265,7 +263,7 @@
regno &= 0xff;
ich_waitcd(sc);
- return (bus_space_read_2(sc->nambart, sc->nambarh, regno));
+ return (bus_read_2(sc->res[RES_NAMBAR], regno));
}
static int
@@ -275,7 +273,7 @@
regno &= 0xff;
ich_waitcd(sc);
- bus_space_write_2(sc->nambart, sc->nambarh, regno, data);
+ bus_write_2(sc->res[RES_NAMBAR], regno, data);
return (0);
}
@@ -328,16 +326,16 @@
else
return (ENXIO);
- ich_wr(sc, regbase + ICH_REG_X_CR, 0, 1);
+ ich_wr1(sc, regbase + ICH_REG_X_CR, 0);
#if 1
/* This may result in no sound output on NForce 2 MBs, see PR 73987 */
DELAY(100);
#else
- (void)ich_rd(sc, regbase + ICH_REG_X_CR, 1);
+ (void)ich_rd1(sc, regbase + ICH_REG_X_CR);
#endif
- ich_wr(sc, regbase + ICH_REG_X_CR, ICH_X_CR_RR, 1);
+ ich_wr1(sc, regbase + ICH_REG_X_CR, ICH_X_CR_RR);
for (i = 0; i < ICH_TIMEOUT; i++) {
- cr = ich_rd(sc, regbase + ICH_REG_X_CR, 1);
+ cr = ich_rd1(sc, regbase + ICH_REG_X_CR);
if (cr == 0)
return (0);
DELAY(1);
@@ -417,7 +415,7 @@
return (NULL);
ICH_LOCK(sc);
- ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
+ ich_wr4(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr));
ICH_UNLOCK(sc);
return (ch);
@@ -495,7 +493,7 @@
ch->blksz = blocksize;
ich_filldtbl(ch);
ICH_LOCK(sc);
- ich_wr(sc, ch->regbase + ICH_REG_X_LVI, ch->blkcnt - 1, 1);
+ ich_wr1(sc, ch->regbase + ICH_REG_X_LVI, ch->blkcnt - 1);
ICH_UNLOCK(sc);
return (ch->blksz);
@@ -518,8 +516,8 @@
case PCMTRIG_START:
ch->run = 1;
ICH_LOCK(sc);
- ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
- ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM | ICH_X_CR_LVBIE | ICH_X_CR_IOCE, 1);
+ ich_wr4(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr));
+ ich_wr1(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM | ICH_X_CR_LVBIE | ICH_X_CR_IOCE);
ICH_UNLOCK(sc);
break;
case PCMTRIG_STOP:
@@ -550,7 +548,7 @@
);
ICH_LOCK(sc);
- ch->civ = ich_rd(sc, ch->regbase + ICH_REG_X_CIV, 1) % ch->blkcnt;
+ ch->civ = ich_rd1(sc, ch->regbase + ICH_REG_X_CIV) % ch->blkcnt;
ICH_UNLOCK(sc);
pos = ch->civ * ch->blksz;
@@ -607,10 +605,10 @@
__func__);
);
- gs = ich_rd(sc, ICH_REG_GLOB_STA, 4) & ICH_GLOB_STA_IMASK;
+ gs = ich_rd4(sc, ICH_REG_GLOB_STA) & ICH_GLOB_STA_IMASK;
if (gs & (ICH_GLOB_STA_PRES | ICH_GLOB_STA_SRES)) {
/* Clear resume interrupt(s) - nothing doing with them */
- ich_wr(sc, ICH_REG_GLOB_STA, gs, 4);
+ ich_wr4(sc, ICH_REG_GLOB_STA, gs);
}
gs &= ~(ICH_GLOB_STA_PRES | ICH_GLOB_STA_SRES);
@@ -619,9 +617,8 @@
if ((ch->imask & gs) == 0)
continue;
gs &= ~ch->imask;
- st = ich_rd(sc, ch->regbase +
- ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR),
- 2);
+ st = ich_rd2(sc, ch->regbase +
+ ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR));
st &= ICH_X_SR_FIFOE | ICH_X_SR_BCIS | ICH_X_SR_LVBCI;
if (st & (ICH_X_SR_BCIS | ICH_X_SR_LVBCI)) {
/* block complete - update buffer */
@@ -630,7 +627,7 @@
chn_intr(ch->channel);
ICH_LOCK(sc);
}
- lvi = ich_rd(sc, ch->regbase + ICH_REG_X_LVI, 1);
+ lvi = ich_rd1(sc, ch->regbase + ICH_REG_X_LVI);
cbi = ch->civ % ch->blkcnt;
if (cbi == 0)
cbi = ch->blkcnt - 1;
@@ -642,13 +639,13 @@
else
lvi += cbi + ch->blkcnt - lbi;
lvi %= ICH_DTBL_LENGTH;
- ich_wr(sc, ch->regbase + ICH_REG_X_LVI, lvi, 1);
+ ich_wr1(sc, ch->regbase + ICH_REG_X_LVI, lvi);
}
/* clear status bit */
- ich_wr(sc, ch->regbase +
+ ich_wr2(sc, ch->regbase +
((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR),
- st, 2);
+ st);
}
ICH_UNLOCK(sc);
if (gs != 0) {
@@ -685,8 +682,10 @@
snprintf(status, SND_STATUSLEN,
"at io 0x%lx, 0x%lx irq %ld bufsz %u %s",
- rman_get_start(sc->nambar), rman_get_start(sc->nabmbar),
- rman_get_start(sc->irq), sc->bufsz,PCM_KLDSTRING(snd_ich));
+ rman_get_start(sc->res[RES_NAMBAR]),
+ rman_get_start(sc->res[RES_NABMBAR]),
+ rman_get_start(sc->res[RES_IRQ]),
+ sc->bufsz, PCM_KLDSTRING(snd_ich));
if (bootverbose && (sc->flags & ICH_DMA_NOCACHE))
device_printf(sc->dev,
@@ -748,28 +747,28 @@
*/
/* prepare */
- ociv = ich_rd(sc, ch->regbase + ICH_REG_X_CIV, 1);
+ ociv = ich_rd1(sc, ch->regbase + ICH_REG_X_CIV);
nciv = ociv;
- ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
+ ich_wr4(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr));
/* start */
microtime(&t1);
- ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM, 1);
+ ich_wr1(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM);
/* wait */
do {
microtime(&t2);
if (t2.tv_sec - t1.tv_sec > 1)
break;
- nciv = ich_rd(sc, ch->regbase + ICH_REG_X_CIV, 1);
+ nciv = ich_rd1(sc, ch->regbase + ICH_REG_X_CIV);
} while (nciv == ociv);
/* stop */
- ich_wr(sc, ch->regbase + ICH_REG_X_CR, 0, 1);
+ ich_wr1(sc, ch->regbase + ICH_REG_X_CR, 0);
/* reset */
DELAY(100);
- ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RR, 1);
+ ich_wr1(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RR);
ch->blkcnt = oblkcnt;
/* turn time delta into us */
@@ -825,9 +824,9 @@
{
uint32_t stat;
- ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD, 4);
+ ich_wr4(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD);
DELAY(600000);
- stat = ich_rd(sc, ICH_REG_GLOB_STA, 4);
+ stat = ich_rd4(sc, ICH_REG_GLOB_STA);
if ((stat & ICH_GLOB_STA_PCR) == 0) {
/* ICH4/ICH5 may fail when busmastering is enabled. Continue */
@@ -841,9 +840,9 @@
}
#if 0
- ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD | ICH_GLOB_CTL_PRES, 4);
+ ich_wr4(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD | ICH_GLOB_CTL_PRES);
#else
- ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD, 4);
+ ich_wr4(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD);
#endif
if (ich_resetchan(sc, 0) || ich_resetchan(sc, 1))
@@ -854,6 +853,28 @@
return (0);
}
+static void
+ich_destroy(device_t dev, struct sc_info *sc)
+{
+ if (!sc)
+ return;
+
+ if (sc->ih)
+ bus_teardown_intr(dev, sc->res[RES_IRQ], sc->ih);
+ bus_release_resources(dev, sc->spec, sc->res);
+ if (sc->dtmap)
+ bus_dmamap_unload(sc->dmat, sc->dtmap);
+ if (sc->dtbl)
+ bus_dmamem_free(sc->dmat, sc->dtbl, sc->dtmap);
+ if (sc->chan_dmat)
+ bus_dma_tag_destroy(sc->chan_dmat);
+ if (sc->dmat)
+ bus_dma_tag_destroy(sc->dmat);
+ if (sc->ich_lock)
+ snd_mtxfree(sc->ich_lock);
+ free(sc, M_DEVBUF);
+}
+
static int
ich_pci_probe(device_t dev)
{
@@ -928,31 +949,16 @@
if (vendor == INTEL_VENDORID && (devid == INTEL_82801DB ||
devid == INTEL_82801EB || devid == INTEL_6300ESB ||
devid == INTEL_82801FB || devid == INTEL_82801GB)) {
- sc->nambarid = PCIR_MMBAR;
- sc->nabmbarid = PCIR_MBBAR;
- sc->regtype = SYS_RES_MEMORY;
+ sc->spec = ich_res_spec_mem;
pci_write_config(dev, PCIR_ICH_LEGACY, ICH_LEGACY_ENABLE, 1);
- } else {
- sc->nambarid = PCIR_NAMBAR;
- sc->nabmbarid = PCIR_NABMBAR;
- sc->regtype = SYS_RES_IOPORT;
- }
+ } else
+ sc->spec = ich_res_spec_io;
- sc->nambar = bus_alloc_resource_any(dev, sc->regtype,
- &sc->nambarid, RF_ACTIVE);
- sc->nabmbar = bus_alloc_resource_any(dev, sc->regtype,
- &sc->nabmbarid, RF_ACTIVE);
-
- if (!sc->nambar || !sc->nabmbar) {
- device_printf(dev, "unable to map IO port space\n");
+ if (bus_alloc_resources(dev, sc->spec, sc->res) != 0) {
+ device_printf(dev, "unable to allocate resources\n");
goto bad;
- }
+ }
- sc->nambart = rman_get_bustag(sc->nambar);
- sc->nambarh = rman_get_bushandle(sc->nambar);
- sc->nabmbart = rman_get_bustag(sc->nabmbar);
- sc->nabmbarh = rman_get_bushandle(sc->nabmbar);
-
sc->bufsz = pcm_getbuffersize(dev,
ICH_MIN_BUFSZ, ICH_DEFAULT_BUFSZ, ICH_MAX_BUFSZ);
@@ -980,10 +986,7 @@
device_get_unit(dev), "fixedrate", &i) == 0 && i != 0)
sc->flags |= ICH_FIXED_RATE;
- sc->irqid = 0;
- sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
- RF_ACTIVE | RF_SHAREABLE);
- if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, ich_intr,
+ if (snd_setup_intr(dev, sc->res[RES_IRQ], INTR_MPSAFE, ich_intr,
sc, &sc->ih)) {
device_printf(dev, "unable to map interrupt\n");
goto bad;
@@ -1085,27 +1088,8 @@
bad:
if (sc->codec)
ac97_destroy(sc->codec);
- if (sc->ih)
- bus_teardown_intr(dev, sc->irq, sc->ih);
- if (sc->irq)
- bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
- if (sc->nambar)
- bus_release_resource(dev, sc->regtype,
- sc->nambarid, sc->nambar);
- if (sc->nabmbar)
- bus_release_resource(dev, sc->regtype,
- sc->nabmbarid, sc->nabmbar);
- if (sc->dtmap)
- bus_dmamap_unload(sc->dmat, sc->dtmap);
- if (sc->dtbl)
- bus_dmamem_free(sc->dmat, sc->dtbl, sc->dtmap);
- if (sc->chan_dmat)
- bus_dma_tag_destroy(sc->chan_dmat);
- if (sc->dmat)
- bus_dma_tag_destroy(sc->dmat);
- if (sc->ich_lock)
- snd_mtxfree(sc->ich_lock);
- free(sc, M_DEVBUF);
+ ich_destroy(dev, sc);
+
return (ENXIO);
}
@@ -1119,17 +1103,8 @@
if (r)
return (r);
sc = pcm_getdevinfo(dev);
+ ich_destroy(dev, sc);
- bus_teardown_intr(dev, sc->irq, sc->ih);
- bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
- bus_release_resource(dev, sc->regtype, sc->nambarid, sc->nambar);
- bus_release_resource(dev, sc->regtype, sc->nabmbarid, sc->nabmbar);
- bus_dmamap_unload(sc->dmat, sc->dtmap);
- bus_dmamem_free(sc->dmat, sc->dtbl, sc->dtmap);
- bus_dma_tag_destroy(sc->chan_dmat);
- bus_dma_tag_destroy(sc->dmat);
- snd_mtxfree(sc->ich_lock);
- free(sc, M_DEVBUF);
return (0);
}
@@ -1139,14 +1114,14 @@
int i;
uint32_t control;
- control = ich_rd(sc, ICH_REG_GLOB_CNT, 4);
+ control = ich_rd4(sc, ICH_REG_GLOB_CNT);
control &= ~(ICH_GLOB_CTL_SHUT);
control |= (control & ICH_GLOB_CTL_COLD) ?
ICH_GLOB_CTL_WARM : ICH_GLOB_CTL_COLD;
- ich_wr(sc, ICH_REG_GLOB_CNT, control, 4);
+ ich_wr4(sc, ICH_REG_GLOB_CNT, control);
for (i = 500000; i; i--) {
- if (ich_rd(sc, ICH_REG_GLOB_STA, 4) & ICH_GLOB_STA_PCR)
+ if (ich_rd4(sc, ICH_REG_GLOB_STA) & ICH_GLOB_STA_PCR)
break; /* or ICH_SCR? */
DELAY(1);
}
@@ -1183,7 +1158,7 @@
sc = pcm_getdevinfo(dev);
- if (sc->regtype == SYS_RES_IOPORT)
+ if (sc->spec == ich_res_spec_io)
pci_enable_io(dev, SYS_RES_IOPORT);
else
pci_enable_io(dev, SYS_RES_MEMORY);
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