PERFORCE change 124196 for review
Warner Losh
imp at FreeBSD.org
Fri Jul 27 16:41:41 UTC 2007
http://perforce.freebsd.org/chv.cgi?CH=124196
Change 124196 by imp at imp_paco-paco on 2007/07/27 16:41:20
IFC @124193
Affected files ...
.. //depot/projects/arm/src/release/doc/en_US.ISO8859-1/relnotes/article.sgml#17 integrate
.. //depot/projects/arm/src/sys/arm/arm/busdma_machdep.c#15 integrate
.. //depot/projects/arm/src/sys/arm/arm/cpufunc.c#16 integrate
.. //depot/projects/arm/src/sys/arm/arm/elf_trampoline.c#16 integrate
.. //depot/projects/arm/src/sys/arm/arm/identcpu.c#13 integrate
.. //depot/projects/arm/src/sys/arm/arm/intr.c#12 integrate
.. //depot/projects/arm/src/sys/arm/arm/pmap.c#34 integrate
.. //depot/projects/arm/src/sys/arm/arm/vm_machdep.c#13 integrate
.. //depot/projects/arm/src/sys/arm/include/armreg.h#6 integrate
.. //depot/projects/arm/src/sys/arm/include/cpufunc.h#9 integrate
.. //depot/projects/arm/src/sys/arm/include/pmap.h#16 integrate
.. //depot/projects/arm/src/sys/arm/include/pte.h#3 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i80321/i80321_pci.c#8 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i80321/i80321_timer.c#8 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i80321/i80321_wdog.c#4 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i80321/i80321var.h#4 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i80321/obio.c#4 integrate
.. //depot/projects/arm/src/sys/arm/xscale/i8134x/i81342_mcu.c#1 branch
.. //depot/projects/arm/src/sys/arm/xscale/i8134x/i81342_pci.c#1 branch
.. //depot/projects/arm/src/sys/arm/xscale/i8134x/i81342_space.c#1 branch
.. //depot/projects/arm/src/sys/arm/xscale/i8134x/obio.c#1 branch
.. //depot/projects/arm/src/sys/arm/xscale/i8134x/obiovar.h#1 branch
.. //depot/projects/arm/src/sys/conf/Makefile.arm#19 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/amrr/amrr.c#6 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/onoe/onoe.c#7 integrate
.. //depot/projects/arm/src/sys/dev/ce/if_ce.c#8 integrate
.. //depot/projects/arm/src/sys/dev/cp/if_cp.c#9 integrate
.. //depot/projects/arm/src/sys/dev/ctau/if_ct.c#9 integrate
.. //depot/projects/arm/src/sys/dev/cx/if_cx.c#8 integrate
.. //depot/projects/arm/src/sys/dev/em/if_em.c#40 integrate
.. //depot/projects/arm/src/sys/dev/usb/ufoma.c#6 integrate
.. //depot/projects/arm/src/sys/i386/isa/clock.c#14 integrate
.. //depot/projects/arm/src/sys/kern/kern_kse.c#16 integrate
.. //depot/projects/arm/src/sys/kern/kern_thread.c#20 integrate
.. //depot/projects/arm/src/sys/kern/subr_bus.c#22 integrate
.. //depot/projects/arm/src/sys/kern/uipc_domain.c#7 integrate
.. //depot/projects/arm/src/sys/net/if.c#22 integrate
.. //depot/projects/arm/src/sys/net/if_ethersubr.c#26 integrate
.. //depot/projects/arm/src/sys/net/netisr.c#4 integrate
.. //depot/projects/arm/src/sys/netinet6/udp6_usrreq.c#16 integrate
.. //depot/projects/arm/src/sys/nfsserver/nfs_srvsubs.c#12 integrate
.. //depot/projects/arm/src/sys/nfsserver/nfs_syscalls.c#11 integrate
.. //depot/projects/arm/src/sys/sys/kernel.h#8 integrate
.. //depot/projects/arm/src/sys/sys/mutex.h#17 integrate
.. //depot/projects/arm/src/sys/sys/proc.h#30 integrate
.. //depot/projects/arm/src/usr.bin/calendar/calendars/calendar.holiday#6 integrate
Differences ...
==== //depot/projects/arm/src/release/doc/en_US.ISO8859-1/relnotes/article.sgml#17 (text+ko) ====
@@ -30,7 +30,7 @@
<corpauthor>The &os; Project</corpauthor>
- <pubdate>$FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/article.sgml,v 1.1053 2007/07/25 15:19:37 bmah Exp $</pubdate>
+ <pubdate>$FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/article.sgml,v 1.1054 2007/07/27 08:40:05 brueffer Exp $</pubdate>
<copyright>
<year>2000</year>
@@ -2266,8 +2266,8 @@
character support. &merged;</para>
<para><application>hostapd</application>
- has been updated from version 0.3.9 to version 0.4.8.
- &merged;</para>
+ has been updated from version 0.3.9 to version 0.5.8.
+ </para>
<para><application>PF</application> has been updated from OpenBSD
version 3.7 to OpenBSD version 4.1.</para>
@@ -2297,8 +2297,8 @@
<literal>audit</literal> group have been added. &merged;</para>
<para><application>WPA Supplicant</application>
- has been updated from version 0.3.9 to version 0.4.8.
- &merged;</para>
+ has been updated from version 0.3.9 to version 0.5.8.
+ </para>
<para><application>zlib</application>
has been updated from version 1.2.2 to version 1.2.3. &merged;</para>
@@ -2462,7 +2462,7 @@
<para>The supported version of
the <application>KDE</application> desktop environment
(<filename role="package">x11/kde3</filename>) has been
- updated from 3.4.2 to 3.5.6. &merged;</para>
+ updated from 3.4.2 to 3.5.7. &merged;</para>
<para>[&arch.amd64;, &arch.i386;] The supported Linux emulation now uses the
libraries in the
==== //depot/projects/arm/src/sys/arm/arm/busdma_machdep.c#15 (text+ko) ====
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.33 2007/06/10 12:33:01 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.34 2007/07/27 14:46:43 cognet Exp $");
/*
* ARM bus dma support routines
@@ -763,8 +763,12 @@
if (__predict_true(pmap == pmap_kernel())) {
(void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep);
if (__predict_false(pmap_pde_section(pde))) {
- curaddr = (*pde & L1_S_FRAME) |
- (vaddr & L1_S_OFFSET);
+ if (*pde & L1_S_SUPERSEC)
+ curaddr = (*pde & L1_SUP_FRAME) |
+ (vaddr & L1_SUP_OFFSET);
+ else
+ curaddr = (*pde & L1_S_FRAME) |
+ (vaddr & L1_S_OFFSET);
if (*pde & L1_S_CACHE_MASK) {
map->flags &=
~DMAMAP_COHERENT;
@@ -1087,36 +1091,36 @@
{
char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
- if (op & BUS_DMASYNC_PREWRITE)
+ if (op & BUS_DMASYNC_PREWRITE) {
cpu_dcache_wb_range((vm_offset_t)buf, len);
+ cpu_l2cache_wb_range((vm_offset_t)buf, len);
+ }
+ if (op & BUS_DMASYNC_PREREAD) {
+ cpu_idcache_wbinv_range((vm_offset_t)buf, len);
+ cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
+ }
if (op & BUS_DMASYNC_POSTREAD) {
- if ((vm_offset_t)buf & arm_dcache_align_mask)
+ if ((vm_offset_t)buf & arm_dcache_align_mask) {
memcpy(_tmp_cl, (void *)((vm_offset_t)buf & ~
arm_dcache_align_mask),
- (vm_offset_t)buf - ((vm_offset_t)buf &~
- arm_dcache_align_mask));
- if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
- memcpy(_tmp_cl, (void *)((vm_offset_t)buf & ~
- arm_dcache_align_mask),
- (vm_offset_t)buf - ((vm_offset_t)buf &~
- arm_dcache_align_mask));
- if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
- memcpy(_tmp_clend, (void *)(((vm_offset_t)buf + len) & ~
- arm_dcache_align_mask),
- (vm_offset_t)buf +len - (((vm_offset_t)buf + len) &~
- arm_dcache_align_mask));
+ (vm_offset_t)buf & arm_dcache_align_mask);
+ }
+ if (((vm_offset_t)buf + len) & arm_dcache_align_mask) {
+ memcpy(_tmp_clend, (void *)((vm_offset_t)buf + len),
+ arm_dcache_align - (((vm_offset_t)(buf) + len) &
+ arm_dcache_align_mask));
+ }
cpu_dcache_inv_range((vm_offset_t)buf, len);
+ cpu_l2cache_inv_range((vm_offset_t)buf, len);
+
if ((vm_offset_t)buf & arm_dcache_align_mask)
memcpy((void *)((vm_offset_t)buf &
- ~arm_dcache_align_mask),
- _tmp_cl,
- (vm_offset_t)buf - ((vm_offset_t)buf &~
- arm_dcache_align_mask));
+ ~arm_dcache_align_mask), _tmp_cl,
+ (vm_offset_t)buf & arm_dcache_align_mask);
if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
- memcpy((void *)(((vm_offset_t)buf + len) & ~
- arm_dcache_align_mask), _tmp_clend,
- (vm_offset_t)buf +len - (((vm_offset_t)buf + len) &~
- arm_dcache_align_mask));
+ memcpy((void *)((vm_offset_t)buf + len), _tmp_clend,
+ arm_dcache_align - (((vm_offset_t)(buf) + len) &
+ arm_dcache_align_mask));
}
}
@@ -1131,14 +1135,20 @@
(void *)(bpage->vaddr_nocache != 0 ?
bpage->vaddr_nocache : bpage->vaddr),
bpage->datacount);
- if (bpage->vaddr_nocache == 0)
+ if (bpage->vaddr_nocache == 0) {
cpu_dcache_wb_range(bpage->vaddr,
bpage->datacount);
+ cpu_l2cache_wb_range(bpage->vaddr,
+ bpage->datacount);
+ }
}
if (op & BUS_DMASYNC_POSTREAD) {
- if (bpage->vaddr_nocache == 0)
+ if (bpage->vaddr_nocache == 0) {
cpu_dcache_inv_range(bpage->vaddr,
bpage->datacount);
+ cpu_l2cache_inv_range(bpage->vaddr,
+ bpage->datacount);
+ }
bcopy((void *)(bpage->vaddr_nocache != 0 ?
bpage->vaddr_nocache : bpage->vaddr),
(void *)bpage->datavaddr, bpage->datacount);
@@ -1175,10 +1185,6 @@
_bus_dmamap_sync_bp(dmat, map, op);
if (map->flags & DMAMAP_COHERENT)
return;
- if ((op && BUS_DMASYNC_POSTREAD) && (map->len >= 2 * PAGE_SIZE)) {
- cpu_dcache_wbinv_all();
- return;
- }
CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
switch(map->flags & DMAMAP_TYPE_MASK) {
case DMAMAP_LINEAR:
==== //depot/projects/arm/src/sys/arm/arm/cpufunc.c#16 (text+ko) ====
@@ -45,7 +45,7 @@
* Created : 30/01/97
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.16 2007/02/11 22:24:54 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.17 2007/07/27 14:39:41 cognet Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -147,6 +147,10 @@
arm7tdmi_cache_flushID, /* idcache_wbinv_all */
(void *)arm7tdmi_cache_flushID, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -205,6 +209,10 @@
arm8_cache_purgeID, /* idcache_wbinv_all */
(void *)arm8_cache_purgeID, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -262,6 +270,10 @@
arm9_idcache_wbinv_all, /* idcache_wbinv_all */
arm9_idcache_wbinv_range, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -378,6 +390,10 @@
arm10_idcache_wbinv_all, /* idcache_wbinv_all */
arm10_idcache_wbinv_range, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -436,6 +452,10 @@
sa1_cache_purgeID, /* idcache_wbinv_all */
sa1_cache_purgeID_rng, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -493,6 +513,10 @@
sa1_cache_purgeID, /* idcache_wbinv_all */
sa1_cache_purgeID_rng, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -550,6 +574,10 @@
sa1_cache_purgeID, /* idcache_wbinv_all */
sa1_cache_purgeID_rng, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -610,6 +638,10 @@
xscale_cache_purgeID, /* idcache_wbinv_all */
xscale_cache_purgeID_rng, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ cpufunc_nullop, /* l2cache_wbinv_range */
+ cpufunc_nullop, /* l2cache_inv_range */
+ cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
@@ -660,15 +692,19 @@
/* Cache operations */
xscalec3_cache_syncI, /* icache_sync_all */
- xscale_cache_syncI_rng, /* icache_sync_range */
+ xscalec3_cache_syncI_rng, /* icache_sync_range */
xscalec3_cache_purgeD, /* dcache_wbinv_all */
xscalec3_cache_purgeD_rng, /* dcache_wbinv_range */
xscale_cache_flushD_rng, /* dcache_inv_range */
xscalec3_cache_cleanD_rng, /* dcache_wb_range */
- xscalec3_cache_purgeID, /* idcache_wbinv_all */
+ xscalec3_cache_purgeID, /* idcache_wbinv_all */
xscalec3_cache_purgeID_rng, /* idcache_wbinv_range */
+ xscalec3_l2cache_purge, /* l2cache_wbinv_all */
+ xscalec3_l2cache_purge_rng, /* l2cache_wbinv_range */
+ xscalec3_l2cache_flush_rng, /* l2cache_inv_range */
+ xscalec3_l2cache_clean_rng, /* l2cache_wb_range */
/* Other functions */
@@ -2009,9 +2045,7 @@
xscale_setup(args)
char *args;
{
-#ifndef CPU_XSCALE_CORE3
uint32_t auxctl;
-#endif
int cpuctrl, cpuctrlmask;
/*
@@ -2031,7 +2065,8 @@
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC;
+ | CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC | \
+ CPU_CONTROL_L2_ENABLE;
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
@@ -2045,6 +2080,9 @@
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#ifdef CPU_XSCALE_CORE3
+ cpuctrl |= CPU_CONTROL_L2_ENABLE;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -2057,7 +2095,6 @@
/* cpu_control(cpuctrlmask, cpuctrl);*/
cpu_control(0xffffffff, cpuctrl);
-#ifndef CPU_XSCALE_CORE3
/* Make sure write coalescing is turned on */
__asm __volatile("mrc p15, 0, %0, c1, c0, 1"
: "=r" (auxctl));
@@ -2066,9 +2103,12 @@
#else
auxctl &= ~XSCALE_AUXCTL_K;
#endif
+#ifdef CPU_XSCALE_CORE3
+ auxctl |= XSCALE_AUXCTL_LLR;
+ auxctl |= XSCALE_AUXCTL_MD_MASK;
+#endif
__asm __volatile("mcr p15, 0, %0, c1, c0, 1"
: : "r" (auxctl));
-#endif
}
#endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425
CPU_XSCALE_80219 */
==== //depot/projects/arm/src/sys/arm/arm/elf_trampoline.c#16 (text+ko) ====
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.17 2007/02/19 00:57:27 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.18 2007/07/27 14:42:25 cognet Exp $");
#include <machine/asm.h>
#include <sys/param.h>
#include <sys/elf32.h>
@@ -48,6 +48,7 @@
extern void *_end;
void __start(void);
+void __startC(void);
#define GZ_HEAD 0xa
@@ -66,7 +67,14 @@
defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
defined(CPU_XSCALE_80219)
#define cpu_idcache_wbinv_all xscale_cache_purgeID
+#elif defined(CPU_XSCALE_81342)
+#define cpu_idcache_wbinv_all xscalec3_cache_purgeID
#endif
+#ifdef CPU_XSCALE_81342
+#define cpu_l2cache_wbinv_all xscalec3_l2cache_purge
+#else
+#define cpu_l2cache_wbinv_all()
+#endif
int arm_picache_size;
@@ -138,7 +146,7 @@
static void arm9_setup(void);
void
-_start(void)
+_startC(void)
{
int physaddr = KERNPHYSADDR;
int tmp1;
@@ -207,6 +215,7 @@
arm9_setup();
#endif
cpu_idcache_wbinv_all();
+ cpu_l2cache_wbinv_all();
#endif
__start();
}
@@ -520,7 +529,7 @@
extern char func_end[];
-#define PMAP_DOMAIN_KERNEL 15 /*
+#define PMAP_DOMAIN_KERNEL 0 /*
* Just define it instead of including the
* whole VM headers set.
*/
@@ -595,10 +604,11 @@
kernel = (char *)&_end;
altdst = 4 + load_kernel((unsigned int)kernel,
(unsigned int)curaddr,
- (unsigned int)&func_end , 0);
+ (unsigned int)&func_end + 800 , 0);
if (altdst > dst)
dst = altdst;
cpu_idcache_wbinv_all();
+ cpu_l2cache_wbinv_all();
__asm __volatile("mrc p15, 0, %0, c1, c0, 0\n"
"bic %0, %0, #1\n" /* MMU_ENABLE */
"mcr p15, 0, %0, c1, c0, 0\n"
@@ -616,7 +626,7 @@
sp = sp &~3;
dst = (void *)(sp + 4);
memcpy((void *)dst, (void *)&load_kernel, (unsigned int)&func_end -
- (unsigned int)&load_kernel);
+ (unsigned int)&load_kernel + 800);
do_call(dst, kernel, dst + (unsigned int)(&func_end) -
- (unsigned int)(&load_kernel), sp);
+ (unsigned int)(&load_kernel) + 800, sp);
}
==== //depot/projects/arm/src/sys/arm/arm/identcpu.c#13 (text+ko) ====
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.10 2006/11/19 23:45:33 sam Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.11 2007/07/27 14:49:11 cognet Exp $");
#include <sys/systm.h>
#include <sys/param.h>
#include <sys/malloc.h>
@@ -420,6 +420,12 @@
printf(" IC disabled");
else
printf(" IC enabled");
+#ifdef CPU_XSCALE_81342
+ if ((ctrl & CPU_CONTROL_L2_ENABLE) == 0)
+ printf(" L2 disabled");
+ else
+ printf(" L2 enabled");
+#endif
break;
default:
break;
==== //depot/projects/arm/src/sys/arm/arm/intr.c#12 (text+ko) ====
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/intr.c,v 1.16 2007/06/04 21:38:45 attilio Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/intr.c,v 1.17 2007/07/27 14:26:42 cognet Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/syslog.h>
@@ -57,6 +57,27 @@
void arm_handler_execute(struct trapframe *, int);
+#ifdef INTR_FILTER
+static void
+intr_disab_eoi_src(void *arg)
+{
+ uintptr_t nb;
+
+ nb = (uintptr_t)arg;
+ arm_mask_irq(nb);
+}
+
+static void
+intr_eoi_src(void *arg)
+{
+ uintptr_t nb;
+
+ nb = (uintptr_t)arg;
+ arm_unmask_irq(nb);
+}
+
+#endif
+
void
arm_setup_irqhandler(const char *name, driver_filter_t *filt,
void (*hand)(void*), void *arg, int irq, int flags, void **cookiep)
@@ -68,8 +89,14 @@
return;
event = intr_events[irq];
if (event == NULL) {
+#ifdef INTR_FILTER
error = intr_event_create(&event, (void *)irq, 0,
+ (void (*)(void *))arm_unmask_irq, intr_eoi_src,
+ intr_disab_eoi_src, "intr%d:", irq);
+#else
+ error = intr_event_create(&event, (void *)irq, 0,
(void (*)(void *))arm_unmask_irq, "intr%d:", irq);
+#endif
if (error)
return;
intr_events[irq] = event;
@@ -102,19 +129,33 @@
arm_handler_execute(struct trapframe *frame, int irqnb)
{
struct intr_event *event;
- struct intr_handler *ih;
struct thread *td = curthread;
+#ifdef INTR_FILTER
+ int i;
+#else
int i, thread, ret;
+ struct intr_handler *ih;
+#endif
PCPU_INC(cnt.v_intr);
td->td_intr_nesting_level++;
while ((i = arm_get_next_irq()) != -1) {
+#ifndef INTR_FILTER
arm_mask_irq(i);
+#endif
intrcnt[intrcnt_tab[i]]++;
event = intr_events[i];
- if (!event || TAILQ_EMPTY(&event->ie_handlers))
+ if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
+#ifdef INTR_FILTER
+ arm_mask_irq(i);
+#endif
continue;
+ }
+#ifdef INTR_FILTER
+ intr_event_handle(event, frame);
+ /* XXX: Log stray IRQs */
+#else
/* Execute fast handlers. */
ret = 0;
thread = 0;
@@ -139,6 +180,7 @@
intr_event_schedule_thread(event);
else
arm_unmask_irq(i);
+#endif
}
td->td_intr_nesting_level--;
}
==== //depot/projects/arm/src/sys/arm/arm/pmap.c#34 (text+ko) ====
@@ -147,7 +147,7 @@
#include "opt_vm.h"
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.83 2007/06/11 21:29:26 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.84 2007/07/27 14:45:04 cognet Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
@@ -676,8 +676,14 @@
pmap_copy_page_func = pmap_copy_page_generic;
pmap_zero_page_func = pmap_zero_page_generic;
xscale_use_minidata = 0;
- pte_l1_s_cache_mode_pt = pte_l2_l_cache_mode_pt =
- pte_l2_s_cache_mode_pt = 0;
+ /* Make sure it is L2-cachable */
+ pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_T);
+ pte_l1_s_cache_mode_pt = pte_l1_s_cache_mode &~ L1_S_XSCALE_P;
+ pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_T) ;
+ pte_l2_l_cache_mode_pt = pte_l1_s_cache_mode;
+ pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_T);
+ pte_l2_s_cache_mode_pt = pte_l2_s_cache_mode;
+
#else
pmap_copy_page_func = pmap_copy_page_xscale;
pmap_zero_page_func = pmap_zero_page_xscale;
@@ -2818,33 +2824,35 @@
* Low level mapping routines.....
***************************************************/
+#ifdef ARM_HAVE_SUPERSECTIONS
/* Map a super section into the KVA. */
void
pmap_kenter_supersection(vm_offset_t va, uint64_t pa, int flags)
{
- pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_OFFSET) |
- (((pa >> 32) & 0x8) << 20) | L1_S_PROT(PTE_KERNEL,
+ pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_FRAME) |
+ (((pa >> 32) & 0xf) << 20) | L1_S_PROT(PTE_KERNEL,
VM_PROT_READ|VM_PROT_WRITE) | L1_S_DOM(PMAP_DOMAIN_KERNEL);
struct l1_ttable *l1;
- vm_offset_t va_end;
+ vm_offset_t va0, va_end;
KASSERT(((va | pa) & L1_SUP_OFFSET) == 0,
- ("Not a valid section mapping"));
+ ("Not a valid super section mapping"));
if (flags & SECTION_CACHE)
pd |= pte_l1_s_cache_mode;
else if (flags & SECTION_PT)
pd |= pte_l1_s_cache_mode_pt;
- va = va & L1_SUP_OFFSET;
+ va0 = va & L1_SUP_FRAME;
va_end = va + L1_SUP_SIZE;
SLIST_FOREACH(l1, &l1_list, l1_link) {
+ va = va0;
for (; va < va_end; va += L1_S_SIZE) {
l1->l1_kva[L1_IDX(va)] = pd;
PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
}
}
-
}
+#endif
/* Map a section into the KVA. */
@@ -3681,7 +3689,11 @@
* These should only happen for pmap_kernel()
*/
KASSERT(pm == pmap_kernel(), ("huh"));
- pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
+ /* XXX: what to do about the bits > 32 ? */
+ if (l1pd & L1_S_SUPERSEC)
+ pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
+ else
+ pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
} else {
/*
* Note that we can't rely on the validity of the L1
@@ -3744,7 +3756,11 @@
* These should only happen for pmap_kernel()
*/
KASSERT(pmap == pmap_kernel(), ("huh"));
- pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
+ /* XXX: what to do about the bits > 32 ? */
+ if (l1pd & L1_S_SUPERSEC)
+ pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
+ else
+ pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
if (l1pd & L1_S_PROT_W || (prot & VM_PROT_WRITE) == 0) {
m = PHYS_TO_VM_PAGE(pa);
vm_page_hold(m);
==== //depot/projects/arm/src/sys/arm/arm/vm_machdep.c#13 (text+ko) ====
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/vm_machdep.c,v 1.32 2007/06/04 23:57:29 jeff Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/vm_machdep.c,v 1.33 2007/07/27 14:46:15 cognet Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -118,11 +118,13 @@
pcb1 = td1->td_pcb;
pcb2 = (struct pcb *)(td2->td_kstack + td2->td_kstack_pages * PAGE_SIZE) - 1;
#ifdef __XSCALE__
+#ifndef CPU_XSCALE_CORE3
pmap_use_minicache(td2->td_kstack, td2->td_kstack_pages * PAGE_SIZE);
if (td2->td_altkstack)
pmap_use_minicache(td2->td_altkstack, td2->td_altkstack_pages *
PAGE_SIZE);
#endif
+#endif
td2->td_pcb = pcb2;
bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
mdp2 = &p2->p_md;
@@ -338,7 +340,9 @@
td->td_frame = (struct trapframe *)
((u_int)td->td_kstack + USPACE_SVC_STACK_TOP - sizeof(struct pcb)) - 1;
#ifdef __XSCALE__
+#ifndef CPU_XSCALE_CORE3
pmap_use_minicache(td->td_kstack, td->td_kstack_pages * PAGE_SIZE);
+#endif
#endif
}
@@ -462,6 +466,14 @@
vm_offset_t alloc_firstaddr;
+#ifdef ARM_HAVE_SUPERSECTIONS
+#define S_FRAME L1_SUP_FRAME
+#define S_SIZE L1_SUP_SIZE
+#else
+#define S_FRAME L1_S_FRAME
+#define S_SIZE L1_S_SIZE
+#endif
+
vm_offset_t
arm_ptovirt(vm_paddr_t pa)
{
@@ -472,11 +484,11 @@
for (i = 0; dump_avail[i + 1]; i += 2) {
if (pa >= dump_avail[i] && pa < dump_avail[i + 1])
break;
- addr += (dump_avail[i + 1] & L1_S_FRAME) + L1_S_SIZE -
- (dump_avail[i] & L1_S_FRAME);
+ addr += (dump_avail[i + 1] & S_FRAME) + S_SIZE -
+ (dump_avail[i] & S_FRAME);
}
KASSERT(dump_avail[i + 1] != 0, ("Trying to access invalid physical address"));
- return (addr + (pa - (dump_avail[i] & L1_S_FRAME)));
+ return (addr + (pa - (dump_avail[i] & S_FRAME)));
}
void
@@ -492,20 +504,26 @@
*/
for (i = 0; dump_avail[i + 1]; i+= 2) {
- to_map += (dump_avail[i + 1] & L1_S_FRAME) + L1_S_SIZE -
- (dump_avail[i] & L1_S_FRAME);
+ to_map += (dump_avail[i + 1] & S_FRAME) + S_SIZE -
+ (dump_avail[i] & S_FRAME);
}
alloc_firstaddr = mapaddr = KERNBASE - to_map;
for (i = 0; dump_avail[i + 1]; i+= 2) {
- vm_offset_t size = (dump_avail[i + 1] & L1_S_FRAME) +
- L1_S_SIZE - (dump_avail[i] & L1_S_FRAME);
+ vm_offset_t size = (dump_avail[i + 1] & S_FRAME) +
+ S_SIZE - (dump_avail[i] & S_FRAME);
vm_offset_t did = 0;
- while (size > 0 ) {
+ while (size > 0) {
+#ifdef ARM_HAVE_SUPERSECTIONS
+ pmap_kenter_supersection(mapaddr,
+ (dump_avail[i] & L1_SUP_FRAME) + did,
+ SECTION_CACHE);
+#else
pmap_kenter_section(mapaddr,
(dump_avail[i] & L1_S_FRAME) + did, SECTION_CACHE);
- mapaddr += L1_S_SIZE;
- did += L1_S_SIZE;
- size -= L1_S_SIZE;
+#endif
+ mapaddr += S_SIZE;
+ did += S_SIZE;
+ size -= S_SIZE;
}
}
}
==== //depot/projects/arm/src/sys/arm/include/armreg.h#6 (text+ko) ====
@@ -35,7 +35,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/arm/include/armreg.h,v 1.5 2006/11/07 22:36:56 cognet Exp $
+ * $FreeBSD: src/sys/arm/include/armreg.h,v 1.6 2007/07/27 14:54:27 cognet Exp $
*/
#ifndef MACHINE_ARMREG_H
@@ -237,17 +237,22 @@
#define CPU_CONTROL_VECRELOC 0x00002000 /* V: Vector relocation */
#define CPU_CONTROL_ROUNDROBIN 0x00004000 /* RR: Predictable replacement */
#define CPU_CONTROL_V4COMPAT 0x00008000 /* L4: ARMv4 compat LDR R15 etc */
+#define CPU_CONTROL_L2_ENABLE 0x04000000 /* L2 Cache enabled */
#define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE
/* XScale Auxillary Control Register (CP15 register 1, opcode2 1) */
#define XSCALE_AUXCTL_K 0x00000001 /* dis. write buffer coalescing */
#define XSCALE_AUXCTL_P 0x00000002 /* ECC protect page table access */
+/* Note: XSCale core 3 uses those for LLR DCcahce attributes */
#define XSCALE_AUXCTL_MD_WB_RA 0x00000000 /* mini-D$ wb, read-allocate */
#define XSCALE_AUXCTL_MD_WB_RWA 0x00000010 /* mini-D$ wb, read/write-allocate */
#define XSCALE_AUXCTL_MD_WT 0x00000020 /* mini-D$ wt, read-allocate */
#define XSCALE_AUXCTL_MD_MASK 0x00000030
+/* Xscale Core 3 only */
+#define XSCALE_AUXCTL_LLR 0x00000400 /* Enable L2 for LLR Cache */
+
/* Cache type register definitions */
#define CPU_CT_ISIZE(x) ((x) & 0xfff) /* I$ info */
#define CPU_CT_DSIZE(x) (((x) >> 12) & 0xfff) /* D$ info */
==== //depot/projects/arm/src/sys/arm/include/cpufunc.h#9 (text+ko) ====
@@ -38,7 +38,7 @@
*
* Prototypes for cpu, mmu and tlb related functions.
*
- * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.11 2007/03/21 03:28:16 kevlo Exp $
+ * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.12 2007/07/27 14:39:41 cognet Exp $
*/
#ifndef _MACHINE_CPUFUNC_H_
@@ -140,6 +140,10 @@
void (*cf_idcache_wbinv_all) (void);
void (*cf_idcache_wbinv_range) (vm_offset_t, vm_size_t);
+ void (*cf_l2cache_wbinv_all) (void);
+ void (*cf_l2cache_wbinv_range) (vm_offset_t, vm_size_t);
+ void (*cf_l2cache_inv_range) (vm_offset_t, vm_size_t);
+ void (*cf_l2cache_wb_range) (vm_offset_t, vm_size_t);
/* Other functions */
@@ -189,6 +193,10 @@
#define cpu_idcache_wbinv_all() cpufuncs.cf_idcache_wbinv_all()
#define cpu_idcache_wbinv_range(a, s) cpufuncs.cf_idcache_wbinv_range((a), (s))
+#define cpu_l2cache_wbinv_all() cpufuncs.cf_l2cache_wbinv_all()
+#define cpu_l2cache_wb_range(a, s) cpufuncs.cf_l2cache_wb_range((a), (s))
+#define cpu_l2cache_inv_range(a, s) cpufuncs.cf_l2cache_inv_range((a), (s))
+#define cpu_l2cache_wbinv_range(a, s) cpufuncs.cf_l2cache_wbinv_range((a), (s))
#define cpu_flush_prefetchbuf() cpufuncs.cf_flush_prefetchbuf()
#define cpu_drain_writebuf() cpufuncs.cf_drain_writebuf()
@@ -487,19 +495,22 @@
#ifdef CPU_XSCALE_81342
+void xscalec3_l2cache_purge (void);
+void xscalec3_cache_purgeID (void);
+void xscalec3_cache_purgeD (void);
void xscalec3_cache_cleanID (void);
void xscalec3_cache_cleanD (void);
+void xscalec3_cache_syncI (void);
-void xscalec3_cache_purgeID (void);
-void xscalec3_cache_purgeID_E (u_int entry);
-void xscalec3_cache_purgeD (void);
-void xscalec3_cache_purgeD_E (u_int entry);
+void xscalec3_cache_purgeID_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_cache_purgeD_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_cache_cleanID_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_cache_cleanD_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_cache_syncI_rng (vm_offset_t start, vm_size_t end);
-void xscalec3_cache_syncI (void);
-void xscalec3_cache_cleanID_rng (vm_offset_t start, vm_size_t end);
-void xscalec3_cache_cleanD_rng (vm_offset_t start, vm_size_t end);
-void xscalec3_cache_purgeID_rng (vm_offset_t start, vm_size_t end);
-void xscalec3_cache_purgeD_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_l2cache_flush_rng (vm_offset_t, vm_size_t);
+void xscalec3_l2cache_clean_rng (vm_offset_t start, vm_size_t end);
+void xscalec3_l2cache_purge_rng (vm_offset_t start, vm_size_t end);
void xscalec3_setttb (u_int ttb);
==== //depot/projects/arm/src/sys/arm/include/pmap.h#16 (text+ko) ====
@@ -44,7 +44,7 @@
* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
* from: FreeBSD: src/sys/i386/include/pmap.h,v 1.70 2000/11/30
*
- * $FreeBSD: src/sys/arm/include/pmap.h,v 1.26 2007/06/11 21:29:26 cognet Exp $
+ * $FreeBSD: src/sys/arm/include/pmap.h,v 1.27 2007/07/27 14:45:04 cognet Exp $
*/
#ifndef _MACHINE_PMAP_H_
@@ -264,14 +264,16 @@
#define L1_S_PROT_MASK (L1_S_PROT_U|L1_S_PROT_W)
#define L1_S_CACHE_MASK_generic (L1_S_B|L1_S_C)
-#define L1_S_CACHE_MASK_xscale (L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X))
+#define L1_S_CACHE_MASK_xscale (L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X)|\
+ L1_S_XSCALE_TEX(TEX_XSCALE_T))
#define L2_L_PROT_U (L2_AP(AP_U))
#define L2_L_PROT_W (L2_AP(AP_W))
#define L2_L_PROT_MASK (L2_L_PROT_U|L2_L_PROT_W)
#define L2_L_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X))
+#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X) | \
+ L2_XSCALE_L_TEX(TEX_XSCALE_T))
#define L2_S_PROT_U_generic (L2_AP(AP_U))
#define L2_S_PROT_W_generic (L2_AP(AP_W))
@@ -282,7 +284,8 @@
#define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W)
#define L2_S_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X))
+#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X)| \
+ L2_XSCALE_T_TEX(TEX_XSCALE_X))
#define L1_S_PROTO_generic (L1_TYPE_S | L1_S_IMP)
#define L1_S_PROTO_xscale (L1_TYPE_S)
@@ -348,6 +351,9 @@
#if (ARM_MMU_SA1 == 1) && (ARM_NMMUS == 1)
#define PMAP_NEEDS_PTE_SYNC 1
#define PMAP_INCLUDE_PTE_SYNC
+#elif defined(CPU_XSCALE_81342)
+#define PMAP_NEEDS_PTE_SYNC 1
+#define PMAP_INCLUDE_PTE_SYNC
#elif (ARM_MMU_SA1 == 0)
#define PMAP_NEEDS_PTE_SYNC 0
#endif
@@ -387,8 +393,10 @@
#define PTE_SYNC(pte) \
do { \
- if (PMAP_NEEDS_PTE_SYNC) \
+ if (PMAP_NEEDS_PTE_SYNC) { \
cpu_dcache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\
+ cpu_l2cache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\
+ }\
} while (/*CONSTCOND*/0)
#define PTE_SYNC_RANGE(pte, cnt) \
@@ -396,6 +404,8 @@
if (PMAP_NEEDS_PTE_SYNC) { \
cpu_dcache_wb_range((vm_offset_t)(pte), \
(cnt) << 2); /* * sizeof(pt_entry_t) */ \
+ cpu_l2cache_wb_range((vm_offset_t)(pte), \
+ (cnt) << 2); /* * sizeof(pt_entry_t) */ \
} \
} while (/*CONSTCOND*/0)
@@ -453,6 +463,10 @@
void pmap_use_minicache(vm_offset_t, vm_size_t);
#endif /* ARM_MMU_XSCALE == 1 */
+#if defined(CPU_XSCALE_81342)
+#define ARM_HAVE_SUPERSECTIONS
+#endif
+
#define PTE_KERNEL 0
#define PTE_USER 1
#define l1pte_valid(pde) ((pde) != 0)
@@ -521,7 +535,9 @@
#define SECTION_CACHE 0x1
#define SECTION_PT 0x2
void pmap_kenter_section(vm_offset_t, vm_paddr_t, int flags);
+#ifdef ARM_HAVE_SUPERSECTIONS
void pmap_kenter_supersection(vm_offset_t, uint64_t, int flags);
+#endif
extern char *_tmppt;
==== //depot/projects/arm/src/sys/arm/include/pte.h#3 (text+ko) ====
@@ -31,7 +31,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/arm/include/pte.h,v 1.4 2007/06/11 21:29:26 cognet Exp $
+ * $FreeBSD: src/sys/arm/include/pte.h,v 1.5 2007/07/27 14:45:33 cognet Exp $
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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