PERFORCE change 106529 for review

Warner Losh imp at FreeBSD.org
Fri Sep 22 17:30:38 PDT 2006


http://perforce.freebsd.org/chv.cgi?CH=106529

Change 106529 by imp at imp_lighthouse on 2006/09/23 00:29:40

	Don't touch MR, but that doesn't quite fix things.  I'm almost
	certain that we need to go to an interrupt driven thing...

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/at91_qdmmc.c#13 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/at91_qdmmc.c#13 (text+ko) ====

@@ -134,7 +134,6 @@
 	WR4(sc, MCI_ARGR, arg);
 	WR4(sc, MCI_CMDR, cmd);
 
-	// wait until completed
 	while (!(RD4(sc, MCI_SR) & MCI_SR_CMDRDY))
 		continue;
 
@@ -268,9 +267,9 @@
 	// Select Card
 	at91_qdmmc_SendCommand(dev, SEL_DESEL_CARD_CMD, rca << 16);
 
-	// XXX hard code 4.
-	bus_width = AT91C_BUS_WIDTH_4BITS;
-
+	// XXX hard code 1.
+	bus_width = AT91C_BUS_WIDTH_1BIT;
+	printf("Setting bus width to 1 bit\n");
 	if (at91_qdmmc_SDCard_SendAppCommand(dev, SDCARD_SET_BUS_WIDTH_CMD,
 	    bus_width) != 0)
 		return EIO;
@@ -332,10 +331,10 @@
 	int month = 0;
 	month += ((cid[3] >> 12) & 0xf);
 	printf("SD: Manufacturing Date = %i/%i\n", year, month);
-	sc->cards[0].mode = 5 * MCI_MR_CLKDIV | MCI_MR_PWSDIV |
-	    (MCI_MR_PWSDIV << 1 | MCI_MR_PDCMODE);
-	sc->cards[0].mode = 75 * MCI_MR_CLKDIV | MCI_MR_PWSDIV |
-	    (MCI_MR_PWSDIV << 1);
+	sc->cards[0].mode = 5 * MCI_MR_CLKDIV | /* MCI_MR_PWSDIV |
+	    (MCI_MR_PWSDIV << 1) | */ MCI_MR_PDCMODE;
+//	sc->cards[0].mode = 75 * MCI_MR_CLKDIV | MCI_MR_PWSDIV |
+//	    (MCI_MR_PWSDIV << 1);
 	sc->cards[0].flags = 0;
 	if (sc->cards[0].CSD[1] & CSD_1_RD_B_PAR_M)
 		sc->cards[0].flags |= READ_PARTIAL;
@@ -476,10 +475,10 @@
 		printf("MMC %i: Size = %lld Bytes\n", card,
 		    sc->cards[card].size);
 		/* declare clockrate to 5MHz - XXX the card may allow more */
-		sc->cards[card].mode = 5 * MCI_MR_CLKDIV | MCI_MR_PWSDIV |
-		    (MCI_MR_PWSDIV << 1 | MCI_MR_PDCMODE);
-		sc->cards[card].mode = 75 * MCI_MR_CLKDIV | MCI_MR_PWSDIV |
-		    (MCI_MR_PWSDIV << 1);
+		sc->cards[card].mode = 5 * MCI_MR_CLKDIV | /* MCI_MR_PWSDIV |
+		    (MCI_MR_PWSDIV << 1) | */  MCI_MR_PDCMODE;
+//		sc->cards[card].mode = 75 * MCI_MR_CLKDIV | /* MCI_MR_PWSDIV |
+//		    (MCI_MR_PWSDIV << 1); */
 		sc->cards[card].flags = 0;
 		if (sc->cards[card].CSD[1] & CSD_1_RD_B_PAR_M)
 			sc->cards[card].flags |= READ_PARTIAL;
@@ -511,6 +510,7 @@
 
 	AT91_QDMMC_LOCK_INIT(sc);
 
+	printf("BEFORE I FUCK WITH IT == mode 0x%x\n", RD4(sc, MCI_MR));
 	/*
 	 * Allocate DMA tags and maps
 	 */
@@ -529,13 +529,14 @@
 	// disable all interrupt sources
 	WR4(sc, MCI_IDR, 0xffffffff);
 	// set timeout values
-	WR4(sc, MCI_DTOR, MCI_DTOR_DTOMUL_1048576);
+	WR4(sc, MCI_DTOR, MCI_DTOR_DTOMUL_1048576 | MCI_DTOR_DTOCYC);
 	//WR4(sc, MCI_MR, AT91C_MCI_MR_PDCMODE);
 	// set clockrate to just 400kHz needed to identify
-	WR4(sc, MCI_MR, 74 * MCI_MR_CLKDIV | MCI_MR_PWSDIV | (MCI_MR_PWSDIV << 1 | MCI_MR_PDCMODE));
+//	WR4(sc, MCI_MR, 74 * MCI_MR_CLKDIV /* | MCI_MR_PWSDIV | (MCI_MR_PWSDIV << 1) */
+//	  | MCI_MR_PDCMODE);
 	WR4(sc, MCI_SDCR, 0);
 	// enable controller
-	WR4(sc, MCI_CR, MCI_CR_MCIEN | MCI_CR_PWSEN);
+	WR4(sc, MCI_CR, MCI_CR_MCIEN);
 
 	//WR4(sc, PDC_PTCR, PDC_PTCR_TXTDIS);
 	//WR4(sc, PDC_PTCR, PDC_PTCR_RXTDIS);
@@ -594,7 +595,8 @@
 	}
 
 	/* set clockrate to 5MHz - XXX the card may allow more */
-	WR4(sc, MCI_MR, 5 * MCI_MR_CLKDIV | MCI_MR_PWSDIV | (MCI_MR_PWSDIV << 1) | MCI_MR_PDCMODE);
+//	WR4(sc, MCI_MR, 5 * MCI_MR_CLKDIV | 
+//	  /* MCI_MR_PWSDIV | (MCI_MR_PWSDIV << 1) | */ MCI_MR_PDCMODE);
 
 	AT91_QDMMC_UNLOCK(sc);
 
@@ -752,8 +754,9 @@
 			printf("at91_qdmmc_task: read block %lld, bcount %ld\n", bp->bio_pblkno, bp->bio_bcount);
 			uint32_t block;
 			// Init Mode Register
-			WR4(sc, MCI_MR, sc->cards[0].mode | MCI_MR_PDCMODE |
-			  (sc->cards[0].sector_size << 16));
+//			WR4(sc, MCI_MR, sc->cards[0].mode | MCI_MR_PDCMODE |
+//			  (sc->cards[0].sector_size << 16));
+			WR4(sc, MCI_MR, 0x8301 | (sc->cards[0].sector_size << 16));
 			printf("mode 0x%x\n", RD4(sc, MCI_MR));
 			sz = sc->cards[0].sector_size;
 			for (block = bp->bio_pblkno; block < bp->bio_pblkno + (bp->bio_bcount / sz); block++) {
@@ -783,21 +786,22 @@
 
 				printf("block = %#x vaddr = %p, RPR = 0x%x, RCR = 0x%x\n", block, vaddr,
 				    RD4(sc, PDC_RPR), RD4(sc, PDC_RCR));
+				printf("SR is %x before we get going\n", RD4(sc, MCI_SR));
+				WR4(sc, MCI_IER, MCI_SR_ENDRX | 0xffff0000);
 				status = at91_qdmmc_SendCommand(sc->dev, READ_SINGLE_BLOCK_CMD, block * sz);
-//				WR4(sc, MCI_IER, MCI_SR_RXBUFF | MCI_SR_ENDRX);
 				WR4(sc, PDC_PTCR, PDC_PTCR_RXTEN);
 
 				printf("at91_qdmmc_task: read-status = 0x%x\n", status);
 
 				// wait for completion
 				printf("TO SLEEP, PURCHANCE TO DREAM\n");
-#if 0
+#if 1
 				msleep(sc, &sc->sc_mtx, PRIBIO, "endrx", 0);
 				printf("DONE SLEEPING\n");
 #endif
 				at91_qdmmc_wait_ready(sc);
 				printf("SR is %x\n", RD4(sc, MCI_SR));
-#if 0
+#if 1
 
 				// safety check
 				while ((RD4(sc, MCI_SR) & MCI_SR_ENDRX) == 0)
@@ -828,7 +832,7 @@
 			printf("at91_qdmmc_task: deselect_card-status = 0x%x\n", status);
 
 			// Reset Mode Register
-			WR4(sc, MCI_MR, sc->cards[0].mode);
+//			WR4(sc, MCI_MR, sc->cards[0].mode);
 			biodone(bp);
 			continue;
 		}
@@ -838,7 +842,7 @@
 			uint32_t *tmpbuf;
 
 			// Init Mode Register
-			WR4(sc, MCI_MR, sc->cards[0].mode | (sc->cards[0].sector_size << 16));
+//			WR4(sc, MCI_MR, sc->cards[0].mode | (sc->cards[0].sector_size << 16));
 			printf("mode 0x%x\n", RD4(sc, MCI_MR));
 
 			status = at91_qdmmc_SendCommand(sc->dev,
@@ -898,7 +902,7 @@
 			printf("at91_qdmmc_task: deselect_card-status = 0x%x\n", status);
 
 			// Reset Mode Register
-			WR4(sc, MCI_MR, sc->cards[0].mode);
+//			WR4(sc, MCI_MR, sc->cards[0].mode);
 			biodone(bp);
 			continue;
 		}


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