PERFORCE change 102209 for review
John-Mark Gurney
jmg at FreeBSD.org
Sun Jul 23 16:24:36 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=102209
Change 102209 by jmg at jmg_carbon on 2006/07/23 16:23:46
bring in my pci work from my branch... This gets me into the
ath hal, but for some reason it crashes in the hal...
Interrupts are still not implemented, I think this will be required
to be a pci hint since it is possible for there to be more than the
normal four pci ints..
Affected files ...
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/files.ixp425#3 integrate
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#7 integrate
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#1 branch
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425var.h#3 integrate
Differences ...
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/files.ixp425#3 (text+ko) ====
@@ -4,9 +4,10 @@
arm/xscale/ixp425/ixp425.c standard
arm/xscale/ixp425/ixp425_mem.c standard
arm/xscale/ixp425/ixp425_space.c standard
-arm/xscale/ixp425/ixp425_pci_asm.S standard
-arm/xscale/ixp425/ixp425_pci_space.c standard
arm/xscale/ixp425/ixp425_timer.c standard
+arm/xscale/ixp425/ixp425_pci.c optional pci
+arm/xscale/ixp425/ixp425_pci_asm.S optional pci
+arm/xscale/ixp425/ixp425_pci_space.c optional pci
arm/xscale/ixp425/uart_cpu_ixp425.c optional uart
arm/xscale/ixp425/uart_bus_ixp425.c optional uart
arm/xscale/ixp425/ixp425_a4x_space.c optional uart
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#7 (text+ko) ====
@@ -56,23 +56,39 @@
volatile uint32_t intr_enabled;
uint32_t intr_steer = 0;
-struct ixp425_softc *ixp425_softc;
+struct ixp425_softc *ixp425_softc = NULL;
+
+static int ixp425_probe(device_t);
+static void ixp425_identify(driver_t *, device_t);
+static int ixp425_attach(device_t);
-int ixp425_probe(device_t);
-void ixp425_identify(driver_t *, device_t);
-int ixp425_attach(device_t);
+static struct {
+ uint32_t hwbase;
+ uint32_t size;
+ uint32_t vbase;
+} hwvtrans[] = {
+ { IXP425_IO_HWBASE, IXP425_IO_SIZE, IXP425_IO_VBASE },
+ { IXP425_EXP_HWBASE, IXP425_EXP_SIZE, IXP425_EXP_VBASE },
+ { IXP425_PCI_HWBASE, IXP425_PCI_SIZE, IXP425_PCI_VBASE },
+ { IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, IXP425_PCI_MEM_VBASE },
+ /*{ IXP425_PCI_IO_HWBASE, IXP425_PCI_IO_SIZE, IXP425_PCI_IO_VBASE },*/
+ { IXP425_MCU_HWBASE, IXP425_MCU_SIZE, IXP425_MCU_VBASE },
+};
-int
-ixp425_probe(device_t dev)
+static int
+getvbase(uint32_t hwbase, uint32_t size, uint32_t *vbase)
{
- device_set_desc(dev, "Intel IXP425");
- return (0);
-}
+ int i;
+
+ for (i = 0; i < sizeof hwvtrans / sizeof *hwvtrans; i++) {
+ if (hwbase >= hwvtrans[i].hwbase &&
+ hwbase + size <= hwvtrans[i].hwbase + hwvtrans[i].size) {
+ *vbase = hwbase - hwvtrans[i].hwbase + hwvtrans[i].vbase;
+ return (0);
+ }
+ }
-void
-ixp425_identify(driver_t *driver, device_t parent)
-{
- BUS_ADD_CHILD(parent, 0, "ixp", 0);
+ return (ENOENT);
}
struct arm32_dma_range *
@@ -87,58 +103,6 @@
return (0);
}
-int
-ixp425_attach(device_t dev)
-{
- struct ixp425_softc *sc = device_get_softc(dev);
- int unit = device_get_unit(dev);
- sc->sc_iot = &ixp425_bs_tag;
- ixp425_softc = sc;
-
- /*
- * Mapping for PCI CSR
- */
- if (bus_space_map(sc->sc_iot, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
- 0, &sc->sc_pci_ioh))
- panic("ixp%d: unable to map PCI registers", unit);
-
- /*
- * Mapping for GPIO Registers
- */
- if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE,
- 0, &sc->sc_gpio_ioh))
- panic("ixp%d: unable to map GPIO registers", unit);
-
- /*
- * Mapping for Expansion Bus Registers
- */
- if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
- 0, &sc->sc_ioh))
- panic("ixp%d: unable to map expansion bus registers", unit);
-
- intr_enabled = 0;
- ixp425_set_intrmask();
- ixp425_set_intrsteer();
-
- sc->sc_irq_rman.rm_type = RMAN_ARRAY;
- sc->sc_irq_rman.rm_descr = "IXP425 IRQs";
- if (rman_init(&sc->sc_irq_rman) != 0 ||
- rman_manage_region(&sc->sc_irq_rman, 0, 31) != 0)
- panic("ixp425_attach: failed to set up IRQ rman");
-
- sc->sc_sysmem_rman.rm_type = RMAN_ARRAY;
- sc->sc_sysmem_rman.rm_descr = "IXP425 System memory";
- if (rman_init(&sc->sc_sysmem_rman) != 0 ||
- rman_manage_region(&sc->sc_sysmem_rman, IXP425_IO_VBASE,
- IXP425_IO_VBASE + IXP425_IO_SIZE) != 0)
- panic("ixp425_attach: failed to set up sys mem rman");
- device_add_child(dev, "ixpclk", 0);
- bus_generic_probe(dev);
- bus_generic_attach(dev);
-
- return (0);
-}
-
void
arm_mask_irq(uintptr_t nb)
{
@@ -160,7 +124,7 @@
}
int
-arm_get_next_irq()
+arm_get_next_irq(void)
{
int irq;
@@ -170,7 +134,7 @@
}
void
-cpu_reset()
+cpu_reset(void)
{
u_int32_t reg;
@@ -179,10 +143,10 @@
/*
* Map the boot Flash device down at physical address 0.
*/
- reg = bus_space_read_4(ixp425_softc->sc_iot, IXP425_EXP_VBASE,
+ reg = bus_space_read_4(&ixp425_bs_tag, IXP425_EXP_VBASE,
EXP_CNFG0_OFFSET);
reg |= EXP_CNFG0_MEM_MAP;
- bus_space_write_4(ixp425_softc->sc_iot, IXP425_EXP_VBASE,
+ bus_space_write_4(&ixp425_bs_tag, IXP425_EXP_VBASE,
EXP_CNFG0_OFFSET, reg);
cpu_idcache_wbinv_all();
/* Jump into the bootcode's reset vector. */
@@ -200,30 +164,90 @@
for(;;);
}
+static void
+ixp425_identify(driver_t *driver, device_t parent)
+{
+ BUS_ADD_CHILD(parent, 0, "ixp", 0);
+}
+
+static int
+ixp425_probe(device_t dev)
+{
+ device_set_desc(dev, "Intel IXP425");
+ return (0);
+}
+
+static int
+ixp425_attach(device_t dev)
+{
+ struct ixp425_softc *sc;
+
+ sc = device_get_softc(dev);
+ sc->sc_iot = &ixp425_bs_tag;
+ KASSERT(ixp425_softc == NULL, ("ixp425_attach called twice?"));
+ ixp425_softc = sc;
+
+ intr_enabled = 0;
+ ixp425_set_intrmask();
+ ixp425_set_intrsteer();
+
+ sc->sc_irq_rman.rm_type = RMAN_ARRAY;
+ sc->sc_irq_rman.rm_descr = "IXP425 IRQs";
+ if (rman_init(&sc->sc_irq_rman) != 0 ||
+ rman_manage_region(&sc->sc_irq_rman, 0, 31) != 0)
+ panic("ixp425_attach: failed to set up IRQ rman");
+
+ sc->sc_mem_rman.rm_type = RMAN_ARRAY;
+ sc->sc_mem_rman.rm_descr = "IXP425 Memory";
+ if (rman_init(&sc->sc_mem_rman) != 0 ||
+ rman_manage_region(&sc->sc_mem_rman, 0, ~0) != 0)
+ panic("ixp425_attach: failed to set up IRQ rman");
+
+ device_add_child(dev, "pcib", 0);
+ device_add_child(dev, "ixpclk", 0);
+
+ bus_generic_probe(dev);
+ bus_generic_attach(dev);
+
+ return (0);
+}
+
static struct resource *
ixp425_alloc_resource(device_t dev, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct ixp425_softc *sc = device_get_softc(dev);
+ struct rman *rmanp;
struct resource *rv;
+ uint32_t vbase;
+
+ rv = NULL;
+
+ switch (type) {
+ case SYS_RES_IRQ:
+ rmanp = &sc->sc_irq_rman;
+ break;
+
+ case SYS_RES_MEMORY:
+ rmanp = &sc->sc_mem_rman;
+ if (getvbase(start, end - start, &vbase))
+ return (rv);
+ break;
- if (type == SYS_RES_IRQ) {
- rv = rman_reserve_resource(&sc->sc_irq_rman,
- start, end, count, flags, child);
- if (rv != NULL)
- rman_set_rid(rv, *rid);
+ default:
return (rv);
}
- if (type == SYS_RES_MEMORY) {
- rv = rman_reserve_resource(&sc->sc_sysmem_rman,
- start, end, count, flags, child);
- if (rv != NULL) {
- rman_set_bustag(rv, &ixp425_bs_tag);
- rman_set_bushandle(rv, start);
- return (rv);
+
+ rv = rman_reserve_resource(rmanp, start, end, count, flags, child);
+ if (rv != NULL) {
+ rman_set_rid(rv, *rid);
+ if (type == SYS_RES_MEMORY) {
+ rman_set_bustag(rv, sc->sc_iot);
+ rman_set_bushandle(rv, vbase);
}
}
- return (NULL);
+
+ return (rv);
}
static int
@@ -231,6 +255,7 @@
struct resource *ires, int flags, driver_intr_t *intr, void *arg,
void **cookiep)
{
+
BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, intr, arg,
cookiep);
intr_enabled |= 1 << rman_get_start(ires);
@@ -243,16 +268,21 @@
ixp425_teardown_intr(device_t dev, device_t child, struct resource *res,
void *cookie)
{
+
return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
}
static device_method_t ixp425_methods[] = {
+ /* Device interface */
DEVMETHOD(device_probe, ixp425_probe),
DEVMETHOD(device_attach, ixp425_attach),
DEVMETHOD(device_identify, ixp425_identify),
+
+ /* Bus interface */
DEVMETHOD(bus_alloc_resource, ixp425_alloc_resource),
DEVMETHOD(bus_setup_intr, ixp425_setup_intr),
DEVMETHOD(bus_teardown_intr, ixp425_teardown_intr),
+
{0, 0},
};
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425var.h#3 (text+ko) ====
@@ -47,13 +47,6 @@
#include <dev/pci/pcivar.h>
#include <sys/rman.h>
-#define PCI_CSR_WRITE_4(sc, reg, data) \
- bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh, \
- reg, data)
-
-#define PCI_CSR_READ_4(sc, reg) \
- bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh, reg)
-
#define GPIO_CONF_WRITE_4(sc, reg, data) \
bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, \
reg, data)
@@ -61,32 +54,14 @@
#define GPIO_CONF_READ_4(sc, reg) \
bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
-#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
-#define PCI_CONF_UNLOCK(s) restore_interrupts((s))
-
struct ixp425_softc {
device_t sc_dev;
bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh; /* IRQ handle */
u_int32_t sc_intrmask;
- /* Handles for the various subregions. */
- bus_space_handle_t sc_pci_ioh; /* PCI mem handler */
- bus_space_handle_t sc_gpio_ioh; /* GPIOs handler */
-
- /* Bus space, DMA, and PCI tags for the PCI bus */
- struct bus_space sc_pci_iot;
- struct bus_space sc_pci_memt;
- vm_offset_t sc_pci_va;
struct rman sc_irq_rman;
- struct rman sc_sysmem_rman;
-
- /* GPIO configuration */
- u_int32_t sc_gpio_out;
- u_int32_t sc_gpio_oe;
- u_int32_t sc_gpio_intr1;
- u_int32_t sc_gpio_intr2;
+ struct rman sc_mem_rman;
};
extern struct bus_space ixpsip_bs_tag;
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