PERFORCE change 101880 for review
John Birrell
jb at FreeBSD.org
Tue Jul 18 22:29:02 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=101880
Change 101880 by jb at jb_freebsd2 on 2006/07/18 22:28:57
IFsun4v_stable
Affected files ...
.. //depot/projects/dtrace/src/sys/dev/mpt/mpt.c#10 integrate
.. //depot/projects/dtrace/src/sys/sparc64/sparc64/genassym.c#3 integrate
.. //depot/projects/dtrace/src/sys/sun4v/conf/GENERIC#6 integrate
.. //depot/projects/dtrace/src/sys/sun4v/include/bus.h#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/include/mmu.h#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/include/pcpu.h#3 integrate
.. //depot/projects/dtrace/src/sys/sun4v/include/tte_hash.h#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/hviommu.c#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/machdep.c#3 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/mp_machdep.c#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/nexus.c#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/pmap.c#8 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/trap.c#4 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/tsb.c#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/tte_hash.c#2 integrate
.. //depot/projects/dtrace/src/sys/sun4v/sun4v/wbuf.S#2 integrate
Differences ...
==== //depot/projects/dtrace/src/sys/dev/mpt/mpt.c#10 (text+ko) ====
==== //depot/projects/dtrace/src/sys/sparc64/sparc64/genassym.c#3 (text+ko) ====
@@ -198,13 +198,13 @@
ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
+ASSYM(PC_CALLER, offsetof(struct pcpu, pc_caller));
ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
ASSYM(PC_CPUMASK, offsetof(struct pcpu, pc_cpumask));
ASSYM(PC_IRHEAD, offsetof(struct pcpu, pc_irhead));
ASSYM(PC_IRTAIL, offsetof(struct pcpu, pc_irtail));
ASSYM(PC_IRFREE, offsetof(struct pcpu, pc_irfree));
-ASSYM(PC_MID, offsetof(struct pcpu, pc_mid));
ASSYM(PC_CNT, offsetof(struct pcpu, pc_cnt));
ASSYM(PC_SIZEOF, sizeof(struct pcpu));
@@ -230,6 +230,7 @@
ASSYM(PCB_KSTACK, offsetof(struct pcb, pcb_kstack));
ASSYM(INTR_REPORT_SIZE, INTR_REPORT_SIZE);
#else
+ASSYM(PC_MID, offsetof(struct pcpu, pc_mid));
ASSYM(PC_TLB_CTX, offsetof(struct pcpu, pc_tlb_ctx));
ASSYM(PC_TLB_CTX_MAX, offsetof(struct pcpu, pc_tlb_ctx_max));
ASSYM(PC_TLB_CTX_MIN, offsetof(struct pcpu, pc_tlb_ctx_min));
==== //depot/projects/dtrace/src/sys/sun4v/conf/GENERIC#6 (text+ko) ====
@@ -215,3 +215,4 @@
#device ccd
#options SPIN_PROFILING
+options HZ=100
==== //depot/projects/dtrace/src/sys/sun4v/include/bus.h#2 (text+ko) ====
==== //depot/projects/dtrace/src/sys/sun4v/include/mmu.h#2 (text+ko) ====
@@ -85,6 +85,7 @@
* are ever valid in it (so any user access pagefaults).
*/
#define KCONTEXT 0
+#define CTX_OTHER_SHIFT 16
/*
* FLUSH_ADDR is used in the flush instruction to guarantee stores to mmu
==== //depot/projects/dtrace/src/sys/sun4v/include/pcpu.h#3 (text+ko) ====
@@ -72,14 +72,13 @@
u_long pc_lookup_field; \
u_long pc_last_field; \
u_long pc_tickadj; \
- u_int pc_mid; \
struct rwindow pc_kwbuf; \
u_long pc_kwbuf_sp; \
u_int pc_kwbuf_full; \
struct rwindow pc_tsbwbuf[2]; \
- u_int pc_node; \
+ uint64_t pc_caller; \
uint16_t pc_cpulist[MAXCPU]; \
- uint64_t pad[1];
+ uint64_t pad[2];
/* XXX SUN4V_FIXME - as we access the *_ra and *_size fields in quick
* succession we _really_ want them to be L1 cache line size aligned
==== //depot/projects/dtrace/src/sys/sun4v/include/tte_hash.h#2 (text+ko) ====
@@ -19,7 +19,7 @@
tte_t tte_hash_clear_bits(tte_hash_t hash, vm_offset_t va, uint64_t flags);
-tte_hash_t tte_hash_kernel_create(vm_offset_t, uint64_t);
+tte_hash_t tte_hash_kernel_create(vm_offset_t, uint64_t, vm_paddr_t);
tte_hash_t tte_hash_create(uint64_t context, uint64_t *scratchval);
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/hviommu.c#2 (text+ko) ====
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/machdep.c#3 (text+ko) ====
@@ -394,7 +394,6 @@
pc->pc_mid = UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG));
#endif
pc->pc_addr = (vm_offset_t)pcpu0;
- pc->pc_node = child;
/*
* Initialize global registers.
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/mp_machdep.c#2 (text+ko) ====
@@ -165,7 +165,6 @@
int cpus;
all_cpus = 1 << PCPU_GET(cpuid);
- mp_boot_mid = PCPU_GET(mid);
mp_ncpus = 1;
cpus = 0;
@@ -262,7 +261,6 @@
pc = (struct pcpu *)(va + (PCPU_PAGES * PAGE_SIZE)) - 1;
pcpu_init(pc, cpuid, sizeof(*pc));
pc->pc_addr = va;
- pc->pc_node = child;
all_cpus |= 1 << cpuid;
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/nexus.c#2 (text+ko) ====
@@ -329,32 +329,30 @@
goto fail;
}
+ if ((rman_get_flags(res) & RF_SHAREABLE) == 0)
+ flags |= INTR_EXCL;
+
+ /* We depend here on rman_activate_resource() being idempotent. */
+ if ((error = rman_activate_resource(res)))
+ goto fail;
+
+ error = inthand_add(device_get_nameunit(child), ihdl,
+ intr, arg, flags, cookiep);
+
cpuid = 0;
-
if (hvio_intr_settarget(ihdl, cpuid) != H_EOK) {
error = ENXIO;
goto fail;
}
-
if (hvio_intr_setstate(ihdl, HV_INTR_IDLE_STATE) != H_EOK) {
error = ENXIO;
goto fail;
}
-
if (hvio_intr_setvalid(ihdl, HV_INTR_VALID) != H_EOK) {
error = ENXIO;
goto fail;
}
- if ((rman_get_flags(res) & RF_SHAREABLE) == 0)
- flags |= INTR_EXCL;
-
- /* We depend here on rman_activate_resource() being idempotent. */
- if ((error = rman_activate_resource(res)))
- goto fail;
-
- error = inthand_add(device_get_nameunit(child), ihdl,
- intr, arg, flags, cookiep);
fail:
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/pmap.c#8 (text+ko) ====
@@ -761,7 +761,7 @@
* This could happen earlier - but I put it here to avoid
* attempts to do updates until they're legal
*/
- pm->pm_hash = tte_hash_kernel_create(TLB_PHYS_TO_DIRECT(kernel_hash_pa), kernel_hash_size);
+ pm->pm_hash = tte_hash_kernel_create(TLB_PHYS_TO_DIRECT(kernel_hash_pa), kernel_hash_size, pmap_bootstrap_alloc(PAGE_SIZE));
pm->pm_hashscratch = tte_hash_set_scratchpad_kernel(pm->pm_hash);
for (i = 0; i < translations_size; i++) {
@@ -1336,7 +1336,6 @@
char *func;
cpumask_t active;
#endif
-
if ((eva - sva) == PAGE_SIZE) {
pmap_invalidate_page(pmap, sva, cleartsb);
return;
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/trap.c#4 (text+ko) ====
@@ -394,25 +394,46 @@
break;
case T_DATA_EXCEPTION:
printf("data exception on 0x%lx at 0x%lx\n", data, tf->tf_tpc);
- printf("trap: %ld=%s: 0x%lx at 0x%lx:0x%lx\n", trapno, trap_msg[trap_conversion[trapno]], data, tf->tf_tpc, tf->tf_tnpc);
- case T_DATA_ERROR:
- case T_MEM_ADDRESS_NOT_ALIGNED:
- error = 1;
- break;
-
+ printf("trap: %ld=%s: 0x%lx at 0x%lx:0x%lx\n", trapno,
+ trap_msg[trap_conversion[trapno]], data, tf->tf_tpc, tf->tf_tnpc);
case T_ILLEGAL_INSTRUCTION:
if (tf->tf_tpc > KERNBASE) {
printf("illinstr: 0x%lx\n", tf->tf_tpc);
printf("illinstr: 0x%x\n", *((uint32_t *)tf->tf_tpc));
}
-
+ case T_DATA_ERROR:
+ case T_ALIGNMENT:
+ if (tf->tf_asi == ASI_AIUS) {
+ if (tf->tf_tpc >= (u_long)copy_nofault_begin &&
+ tf->tf_tpc <= (u_long)copy_nofault_end) {
+ tf->tf_tpc = (u_long)copy_fault;
+ tf->tf_tnpc = tf->tf_tpc + 4;
+ error = 0;
+ break;
+ }
+
+ printf("ASI_AIUS but bad tpc\n");
+ }
+ if (tf->tf_tpc >= (u_long)fs_nofault_begin &&
+ tf->tf_tpc <= (u_long)fs_nofault_end) {
+ tf->tf_tpc = (u_long)fs_fault;
+ tf->tf_tnpc = tf->tf_tpc + 4;
+ error = 0;
+ break;
+ }
+ printf("asi=0x%lx\n", tf->tf_asi);
+ error = 1;
+ break;
default:
+ printf("unchecked trap 0x%lx asi=0x%lx\n", trapno, tf->tf_asi);
error = 1;
break;
}
if (error != 0)
- panic("trap: %ld=%s: 0x%lx at 0x%lx:0x%lx error=%d", trapno, trap_msg[trap_conversion[trapno]], data, tf->tf_tpc, tf->tf_tnpc, error);
+ panic("trap: %ld=%s: 0x%lx at 0x%lx:0x%lx error=%d asi=0x%lx",
+ trapno, trap_msg[trap_conversion[trapno]], data, tf->tf_tpc,
+ tf->tf_tnpc, error, tf->tf_asi);
}
CTR1(KTR_TRAP, "trap: td=%p return", td);
}
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/tsb.c#2 (text+ko) ====
@@ -58,7 +58,7 @@
CTASSERT(sizeof(tte_t) == sizeof(uint64_t));
#define TSB_MASK(tsb) ((tsb->hvtsb_ntte) - 1)
/* make TSB start off at the same size as the hash */
-#define TSB_SIZE (1 << HASH_ENTRY_SHIFT)
+#define TSB_SIZE 8
#ifdef DEBUG_TSB
#define DPRINTF printf
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/tte_hash.c#2 (text+ko) ====
@@ -150,7 +150,7 @@
}
tte_hash_t
-tte_hash_kernel_create(vm_offset_t va, uint64_t size)
+tte_hash_kernel_create(vm_offset_t va, uint64_t size, vm_paddr_t fragment_page)
{
tte_hash_t th;
@@ -159,17 +159,40 @@
th->th_entries = 0;
th->th_context = 0;
th->th_hashtable = (tte_hash_entry_t)va;
-
+ th->th_fhtail = th->th_fhhead = (void *)TLB_PHYS_TO_DIRECT(fragment_page);
+
return th;
}
+static inline vm_page_t
+alloc_zeroed_page(void)
+{
+ vm_page_t m;
+ static int color;
+
+ m = NULL;
+
+ while (m == NULL) {
+ m = vm_page_alloc(NULL, color++,
+ VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
+ VM_ALLOC_ZERO);
+
+ if (m == NULL)
+ VM_WAIT;
+ }
+
+ if ((m->flags & PG_ZERO) == 0)
+ pmap_zero_page(m);
+
+ return (m);
+}
+
tte_hash_t
tte_hash_create(uint64_t context, uint64_t *scratchval)
{
tte_hash_t th;
vm_page_t m, tm;
int i;
- static int color;
th = get_tte_hash();
@@ -191,20 +214,11 @@
pmap_zero_page(tm);
th->th_hashtable = (void *)TLB_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
- m = NULL;
- while (m == NULL) {
- m = vm_page_alloc(NULL, color++,
- VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
- VM_ALLOC_ZERO);
+ m = alloc_zeroed_page();
- if (m == NULL)
- VM_WAIT;
- }
- if ((m->flags & PG_ZERO) == 0)
- pmap_zero_page(m);
-
th->th_fhtail = th->th_fhhead = (void *)TLB_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
+ KASSERT(th->th_fhtail != NULL, ("th->th_fhtail == NULL"));
*scratchval = (uint64_t)((vm_offset_t)th->th_hashtable) | ((vm_offset_t)th->th_size);
@@ -273,30 +287,17 @@
struct tte_hash_fragment *fh;
tte_hash_entry_t newentry;
vm_page_t m;
- static int color;
-
+
fh = th->th_fhtail;
if (fh->thf_head.fh_free_head == MAX_FRAGMENT_ENTRIES) {
- m = NULL;
- while (m == NULL) {
- m = vm_page_alloc(NULL, color++,
- VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
- VM_ALLOC_ZERO);
-
- if (m == NULL)
- VM_WAIT;
- }
+ m = alloc_zeroed_page();
- if ((m->flags & PG_ZERO) == 0)
- pmap_zero_page(m);
-
fh->thf_head.fh_next = (void *)TLB_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
fh = th->th_fhtail = (void *)TLB_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
fh->thf_head.fh_free_head = 1;
#ifdef NOISY_DEBUG
printf("new fh=%p \n", fh);
#endif
-
}
newentry = &fh->thf_entries[fh->thf_head.fh_free_head];
==== //depot/projects/dtrace/src/sys/sun4v/sun4v/wbuf.S#2 (text+ko) ====
@@ -145,9 +145,11 @@
wrpr %g0, %g1, %tpc
add %g1, 4, %g1
wrpr %g0, %g1, %tnpc
-
+
set trap, %g1
- mov %g5, %g2
+ mov 1, %g2
+ sllx %g2, CTX_OTHER_SHIFT, %g2
+ or %g5, %g2, %g2
mov %g6, %g3
sub %g0, 1, %g4
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