PERFORCE change 101198 for review
Wojciech A. Koszek
wkoszek at FreeBSD.org
Mon Jul 10 11:58:55 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=101198
Change 101198 by wkoszek at wkoszek_laptop on 2006/07/10 11:58:40
Bring support for UART-based yamon firmwire, which lets us to have
printf() working early.
This is ARM'a code still, but I had to had a skeleton. Olivier said
it's proper way in his opinion.
Affected files ...
.. //depot/projects/mips2/src/sys/mips/mips4k/malta/maltareg.h#1 add
.. //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_bus_maltausart.c#2 edit
.. //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_cpu_maltausart.c#2 edit
.. //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_dev_maltausart.c#2 edit
Differences ...
==== //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_bus_maltausart.c#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) [year] [your name]
+ * Copyright (c) 2006 Wojciech A. Koszek <wkoszek at FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -26,6 +26,11 @@
* $Id$
*/
/*
+ * Skeleton of this file was based on respective code for ARM
+ * code written by Olivier Houchard.
+ */
+
+/*
* XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
* experimental and was written for MIPS32 port.
*/
@@ -53,10 +58,8 @@
/*
* XXXMIPS:
*/
-#if 0
-#include <arm/XXPROCESSOR/XXPROCESSORreg.h>
+#include <mips/mips4k/malta/maltareg.h>
-#endif
#include "uart_if.h"
static int usart_XXPROCESSOR_probe(device_t dev);
@@ -88,12 +91,9 @@
switch (device_get_unit(dev))
{
case 0:
-#ifdef SKYEYE_WORKAROUNDS
- device_set_desc(dev, "USART0");
-#else
device_set_desc(dev, "DBGU");
-#endif
- /*
+
+ /* XXX: This is ARM comment.
* Setting sc_sysdev makes this device a 'system device' and
* indirectly makes it the system console.
*/
==== //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_cpu_maltausart.c#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) [year] [your name]
+ * Copyright (c) 2006 Wojciech A. Koszek <wkoszek at FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -26,6 +26,10 @@
* $Id$
*/
/*
+ * Skeleton of this file was based on respective code for ARM
+ * code written by Olivier Houchard.
+ */
+/*
* XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
* experimental and was written for MIPS32 port.
*/
@@ -38,20 +42,19 @@
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/cons.h>
+
#include <machine/bus.h>
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
-#if 0
-processor/board specific headers
-#endif
+#include <mips/mips4k/malta/maltareg.h>
bus_space_tag_t uart_bus_space_io;
bus_space_tag_t uart_bus_space_mem;
-extern struct uart_ops XXBOARD_usart_ops;
-extern struct bus_space XXBOARD_bs_tag;
+extern struct uart_ops XXPROCESSOR_usart_ops;
+extern struct bus_space XXPROCESSOR_bs_tag;
int
uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
@@ -63,16 +66,17 @@
int
uart_cpu_getdev(int devtype, struct uart_devinfo *di)
{
+ di->ops = XXPROCESSOR_usart_ops;
+ di->bas.chan = 0;
#if 0
- di->ops = XXBOARD_usart_ops;
- di->bas.chan = 0;
- di->bas.bst = &XXBOARD_bs_tag;
+ di->bas.bst = &XXPROCESSOR_bs_tag;
+#endif
/*
* XXXMIPS: You might want to take a look at comment in arm/.. code to
* it's respective function.
*/
- di->bas.bsh = XXX_BASE + XXX_SYS_BASE + DBGU;
+ di->bas.bsh = 0; /* XXX_BASE + XXX_SYS_BASE + DBGU;*/
di->baudrate = 115200;
di->bas.regshft = 0;
@@ -80,11 +84,13 @@
di->databits = 8;
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
- uart_bus_space_io = &XXBOARD_bs_tag;
+#if 0
+ uart_bus_space_io = &XXPROCESSOR_bs_tag;
uart_bus_space_mem = NULL;
+#endif
/* Check the environment for overrides */
if (uart_getenv(devtype, di) == 0)
- return (0);
-#endif
- return (0);
+ return (-1);
+
+ return (-1);
}
==== //depot/projects/mips2/src/sys/mips/mips4k/malta/uart_dev_maltausart.c#2 (text+ko) ====
@@ -202,7 +202,7 @@
/* XXX Need to take possible synchronous mode into account */
#endif
- return (0);
+ return (-1);
}
struct uart_ops XXPROCESSOR_usart_ops = {
@@ -218,7 +218,7 @@
XXPROCESSOR_usart_probe(struct uart_bas *bas)
{
/* We know that this is always here */
- return (0);
+ return (-1);
}
/*
@@ -275,7 +275,7 @@
return (-1);
return (RD4(bas, USART_RHR) & 0xff);
#endif
- return (0);
+ return (-1);
}
/*
@@ -284,15 +284,15 @@
static int
XXPROCESSOR_usart_getc(struct uart_bas *bas, struct mtx *mtx)
{
+#if 0
int c;
c = -1;
-#if 0
while (!(RD4(bas, USART_CSR) & USART_CSR_RXRDY))
continue;
c = RD4(bas, USART_RHR);
c &= 0xff;
#endif
- return (c);
+ return (-1);
}
static int XXPROCESSOR_usart_bus_probe(struct uart_softc *sc);
@@ -324,7 +324,7 @@
int
XXPROCESSOR_usart_bus_probe(struct uart_softc *sc)
{
- return (0);
+ return (-1);
}
#if 0
@@ -436,7 +436,7 @@
errout:;
// XXX bad
#endif
- return (err);
+ return (-1);
}
static int
@@ -478,7 +478,7 @@
WR4(&sc->sc_bas, USART_IER, USART_CSR_TXRDY);
#endif
#endif /* end of #if 0 */
- return (0);
+ return (-1);
}
static int
XXPROCESSOR_usart_bus_setsig(struct uart_softc *sc, int sig)
@@ -513,13 +513,13 @@
WR4(bas, USART_CR, cr);
uart_unlock(sc->sc_hwmtx);
#endif
- return (0);
+ return (-1);
}
static int
XXPROCESSOR_usart_bus_receive(struct uart_softc *sc)
{
- return (0);
+ return (-1);
}
static int
XXPROCESSOR_usart_bus_param(struct uart_softc *sc, int baudrate, int databits,
@@ -529,7 +529,7 @@
return (XXPROCESSOR_usart_param(&sc->sc_bas, baudrate, databits, stopbits,
parity));
#endif
- return (0);
+ return (-1);
}
static int
XXPROCESSOR_usart_bus_ipend(struct uart_softc *sc)
@@ -635,12 +635,12 @@
uart_unlock(sc->sc_hwmtx);
return (ipend);
#endif
- return (0);
+ return (-1);
}
static int
XXPROCESSOR_usart_bus_flush(struct uart_softc *sc, int what)
{
- return (0);
+ return (-1);
}
static int
@@ -668,7 +668,7 @@
sc->sc_hwsig = new;
uart_unlock(sc->sc_hwmtx);
#endif
- return (sig);
+ return (-1);
}
static int
@@ -686,7 +686,7 @@
#if 0
WR4(&sc->sc_bas, USART_BRGR, BAUD2DIVISOR(*(int *)data));
#endif
- return (0);
+ return (-1);
}
return (EINVAL);
}
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