PERFORCE change 100861 for review

[Wojciech A. Koszek]

http://perforce.freebsd.org/chv.cgi?CH=100861

Change 100861 by wkoszek at wkoszek_laptop on 2006/07/07 11:10:37

	Replace jhb's intr_machdep.h with juli's one.
	After bms@ commit it's required with a name change (juli's code
	depended on intr.h, but I think it should be intr_machdep.h
	actually).

Affected files ...

.. //depot/projects/mips2/src/sys/mips/include/intr_machdep.h#2 edit

Differences ...

==== //depot/projects/mips2/src/sys/mips/include/intr_machdep.h#2 (text+ko) ====

@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2003 John Baldwin <jhb at FreeBSD.org>
+ * Copyright (c) 2004 Juli Mallett <jmallett at FreeBSD.org>
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -23,119 +23,26 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/amd64/include/intr_machdep.h,v 1.9 2006/02/28 22:24:54 jhb Exp $
+ * $P4: //depot/projects/mips2/src/sys/mips/include/intr_machdep.h#2 $
  */
 
-#ifndef __MACHINE_INTR_MACHDEP_H__
-#define	__MACHINE_INTR_MACHDEP_H__
+#ifndef	_MACHINE_INTR_H_
+#define	_MACHINE_INTR_H_
 
-#ifdef _KERNEL
+struct trapframe;
 
 /*
- * The maximum number of I/O interrupts we allow.  This number is rather
- * arbitrary as it is just the maximum IRQ resource value.  The interrupt
- * source for a given IRQ maps that I/O interrupt to device interrupt
- * source whether it be a pin on an interrupt controller or an MSI interrupt.
- * The 16 ISA IRQs are assigned fixed IDT vectors, but all other device
- * interrupts allocate IDT vectors on demand.  Currently we have 191 IDT
- * vectors available for device interrupts.  On many systems with I/O APICs,
- * a lot of the IRQs are not used, so this number can be much larger than
- * 191 and still be safe since only interrupt sources in actual use will
- * allocate IDT vectors.
- *
- * For now we stick with 255 as ISA IRQs and PCI intline IRQs only allow
- * for IRQs in the range 0 - 254.  When MSI support is added this number
- * will likely increase.
+ * Include the platform-specific MD interrupt header.
  */
-#define	NUM_IO_INTS	255
-
 /*
- * - 1 ??? dummy counter.
- * - 2 counters for each I/O interrupt.
- * - 1 counter for each CPU for lapic timer.
- * - 7 counters for each CPU for IPI counters for SMP.
+ * XXXMIPS: We don't have this file.
  */
-#ifdef SMP
-#define	INTRCNT_COUNT	(1 + NUM_IO_INTS * 2 + 1)
-#else
-#define	INTRCNT_COUNT	(1 + NUM_IO_INTS * 2 + (1 + 7) * MAXCPU)
+#if 0
+#include <platform/intr.h>
 #endif
 
-#ifndef LOCORE
+void cpu_establish_hardintr(int, void (*)(void *), void *);
+void cpu_establish_softintr(int, void (*)(void *), void *);
+void cpu_intr(struct trapframe *);
 
-typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
-
-#define	IDTVEC(name)	__CONCAT(X,name)
-
-struct intsrc;
-
-/*
- * Methods that a PIC provides to mask/unmask a given interrupt source,
- * "turn on" the interrupt on the CPU side by setting up an IDT entry, and
- * return the vector associated with this source.
- */
-struct pic {
-	void (*pic_enable_source)(struct intsrc *);
-	void (*pic_disable_source)(struct intsrc *, int);
-	void (*pic_eoi_source)(struct intsrc *);
-	void (*pic_enable_intr)(struct intsrc *);
-	int (*pic_vector)(struct intsrc *);
-	int (*pic_source_pending)(struct intsrc *);
-	void (*pic_suspend)(struct intsrc *);
-	void (*pic_resume)(struct intsrc *);
-	int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
-	    enum intr_polarity);
-	void (*pic_assign_cpu)(struct intsrc *, u_int apic_id);
-};
-
-/* Flags for pic_disable_source() */
-enum {
-	PIC_EOI,
-	PIC_NO_EOI,
-};
-
-/*
- * An interrupt source.  The upper-layer code uses the PIC methods to
- * control a given source.  The lower-layer PIC drivers can store additional
- * private data in a given interrupt source such as an interrupt pin number
- * or an I/O APIC pointer.
- */
-struct intsrc {
-	struct pic *is_pic;
-	struct intr_event *is_event;
-	u_long *is_count;
-	u_long *is_straycount;
-	u_int is_index;
-	u_int is_enabled:1;
-};
-
-struct trapframe;
-
-extern struct mtx icu_lock;
-extern int elcr_found;
-
-/* XXX: The elcr_* prototypes probably belong somewhere else. */
-int	elcr_probe(void);
-enum intr_trigger elcr_read_trigger(u_int irq);
-void	elcr_resume(void);
-void	elcr_write_trigger(u_int irq, enum intr_trigger trigger);
-#ifdef SMP
-void	intr_add_cpu(u_int apic_id);
-#else
-#define	intr_add_cpu(apic_id)
-#endif
-int	intr_add_handler(const char *name, int vector, driver_intr_t handler,
-    void *arg, enum intr_type flags, void **cookiep);
-int	intr_config_intr(int vector, enum intr_trigger trig,
-    enum intr_polarity pol);
-void	intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame);
-struct intsrc *intr_lookup_source(int vector);
-int	intr_register_source(struct intsrc *isrc);
-int	intr_remove_handler(void *cookie);
-void	intr_resume(void);
-void	intr_suspend(void);
-void	intrcnt_add(const char *name, u_long **countp);
-
-#endif	/* !LOCORE */
-#endif	/* _KERNEL */
-#endif	/* !__MACHINE_INTR_MACHDEP_H__ */
+#endif /* !_MACHINE_INTR_H_ */