PERFORCE change 100806 for review
Wojciech A. Koszek
wkoszek at FreeBSD.org
Thu Jul 6 22:07:23 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=100806
Change 100806 by wkoszek at wkoszek_laptop on 2006/07/06 22:07:06
Disable intr_enable() and intr_disable() for now. Let other MIPS
hackers to play with MIPS assembler.
XXX: Remember to put files/functions names here, since otherwise it
makes commit logs completely useless while looking at list of
submits.
Changed files: cpufunc.h
Affected files ...
.. //depot/projects/mips2/src/sys/mips/include/cpufunc.h#5 edit
Differences ...
==== //depot/projects/mips2/src/sys/mips/include/cpufunc.h#5 (text+ko) ====
@@ -42,32 +42,39 @@
static __inline register_t
intr_disable(void)
{
- register_t ret, tmp;
-
+ register_t ret;
+#if 0
+ register_t tmp;
+
__asm __volatile("mfc0 %0, $12\n" /* MIPS_COP_0_STATUS */
- "and %1, $%0, ~1\n" /* MIPS_SR_INT_IE */
+ "and %1, %0, $~1\n" /* MIPS_SR_INT_IE */
"mtc0 %1, $12\n" /* MIPS_COP_0_STATUS */
: "=r" (ret), "=r" (tmp));
+#endif
return (ret);
}
static __inline void
intr_enable(void)
{
+#if 0
register_t tmp;
__asm __volatile("mfc %0, $12\n" /* MIPS_COP_0_STATUS */
- "and %0, %0, 1\n" /* MIPS_SR_INT_IE */
+ "or %0, %0, $1\n" /* MIPS_SR_INT_IE */
"mtc0 %0, $12\n" /* MIPS_COP_0_STATUS */
: "=r" (tmp));
+#endif
}
static __inline void
intr_restore(register_t flag)
{
+#if 0
__asm __volatile("mtc0 %0, $12\n" /* MIPS_COP_0_STATUS */
: : "r" (flag));
+#endif
}
/*
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