PERFORCE change 89540 for review

[Olivier Houchard]

http://perforce.freebsd.org/chv.cgi?CH=89540

Change 89540 by cognet at cognet on 2006/01/12 02:18:12

	- Manually disable interrupts by writing in the corresponding IDR for
	all devices that share the IRQ 1 (ST, DBGU, PIOA-PIOD, SDRAM controller,
	RTC). Without that, the first device that unmask the IRQ1 would
	provoke an interrupt storm.
	- Write in the end of interrupt register in arm_irq_unmask(). This is
	not the best place to do it, it should be done once we're done
	servicing interrupts, but it should be harmless. It makes interrupts
	work as expected (without it, we wouldn't get any interrupt after the
	first one).

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/at91.c#3 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/at91.c#3 (text+ko) ====

@@ -255,6 +255,25 @@
 	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff);
 	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff);
 
+	/* XXX */
+	/* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
+	/* Disable all interrupts for PMC (0xc64 == PMC_IDR) */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xc64, 0xffffffff);
+	/* Disable all interrupts for ST */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xd18, 0xffffffff);
+	/* DIsable all interrupts for DBGU */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff);
+	/* Disable all interrupts for PIOA */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x444, 0xffffffff);
+	/* Disable all interrupts for PIOB */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x644, 0xffffffff);
+	/* Disable all interrupts for PIOC */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x844, 0xffffffff);
+	/* Disable all interrupts for PIOD */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xa44, 0xffffffff);
+	/* Disable all interrupts for the SDRAM controller */
+	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
 	at91_add_child(dev, 0, "at91_st", 0, 0, 0, 1);
 	at91_add_child(dev, 10, "at91_udp", 0, AT91RM92_BASE +	// UDP
 	    AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, AT91RM92_IRQ_UDP);
@@ -463,6 +482,8 @@
 	
 	bus_space_write_4(at91_softc->sc_st, 
 	at91_softc->sc_sys_sh, IC_IECR, 1 << nb);
+	bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh,
+	    IC_EOICR, 0);
 
 }