PERFORCE change 91995 for review
Warner Losh
imp at FreeBSD.org
Sat Feb 18 09:08:45 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=91995
Change 91995 by imp at imp_harmony on 2006/02/18 17:08:21
@91961
Affected files ...
.. //depot/projects/arm/src/sys/arm/at91/files.at91#1 branch
.. //depot/projects/arm/src/sys/arm/at91/files.at91rm92#13 delete
.. //depot/projects/arm/src/sys/arm/at91/std.at91#1 branch
.. //depot/projects/arm/src/sys/arm/at91/std.at91rm92#3 delete
.. //depot/projects/arm/src/sys/arm/at91/std.kb920x#3 integrate
.. //depot/projects/arm/src/sys/conf/kmod.mk#6 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-chipset.c#13 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-pci.c#7 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-pci.h#8 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-raid.c#9 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-raid.h#8 integrate
.. //depot/projects/arm/src/sys/dev/bge/if_bge.c#11 integrate
.. //depot/projects/arm/src/sys/dev/ichwd/ichwd.c#2 integrate
.. //depot/projects/arm/src/sys/dev/ichwd/ichwd.h#2 integrate
.. //depot/projects/arm/src/sys/i386/i386/pmap.c#5 integrate
.. //depot/projects/arm/src/sys/kern/kern_mbuf.c#6 integrate
.. //depot/projects/arm/src/sys/kern/kern_sysctl.c#4 integrate
.. //depot/projects/arm/src/sys/kern/uipc_mbuf.c#9 integrate
.. //depot/projects/arm/src/sys/modules/if_vlan/Makefile#3 integrate
.. //depot/projects/arm/src/sys/netgraph/ng_ipfw.h#2 integrate
.. //depot/projects/arm/src/sys/netinet/in_pcb.c#6 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_input.c#5 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_subr.c#4 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_timer.c#3 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_timer.h#2 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_var.h#4 integrate
.. //depot/projects/arm/src/sys/pci/agp_intel.c#5 integrate
.. //depot/projects/arm/src/sys/sys/mbuf.h#9 integrate
.. //depot/projects/arm/src/sys/sys/param.h#10 integrate
.. //depot/projects/arm/src/sys/sys/sysctl.h#5 integrate
.. //depot/projects/arm/src/sys/vm/vm_pageout.c#6 integrate
Differences ...
==== //depot/projects/arm/src/sys/arm/at91/std.kb920x#3 (text+ko) ====
@@ -1,5 +1,5 @@
-#$FreeBSD$
-include "../at91/std.at91rm92"
+#$FreeBSD: src/sys/arm/at91/std.kb920x,v 1.2 2006/02/17 22:33:13 imp Exp $
+include "../at91/std.at91"
files "../at91/files.kb920x"
makeoptions KERNPHYSADDR=0x20000000
==== //depot/projects/arm/src/sys/conf/kmod.mk#6 (text+ko) ====
@@ -1,5 +1,5 @@
# From: @(#)bsd.prog.mk 5.26 (Berkeley) 6/25/91
-# $FreeBSD: src/sys/conf/kmod.mk,v 1.202 2006/02/04 06:22:27 imp Exp $
+# $FreeBSD: src/sys/conf/kmod.mk,v 1.203 2006/02/17 04:59:23 obrien Exp $
#
# The include file <bsd.kmod.mk> handles building and installing loadable
# kernel modules.
@@ -240,7 +240,7 @@
esac ; \
path=`(cd $$path && /bin/pwd)` ; \
${ECHO} ${.TARGET} "->" $$path ; \
- ln -s $$path ${.TARGET}
+ ln -sf $$path ${.TARGET}
CLEANFILES+= ${PROG} ${KMOD}.kld ${OBJS} ${_ILINKS}
@@ -299,7 +299,7 @@
CLEANFILES+= ${_src}
.if !target(${_src})
${_src}:
- ln -s ${KERNBUILDDIR}/${_src} ${.TARGET}
+ ln -sf ${KERNBUILDDIR}/${_src} ${.TARGET}
.endif
.endfor
.else
==== //depot/projects/arm/src/sys/dev/ata/ata-chipset.c#13 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.158 2006/02/13 13:47:58 sos Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.159 2006/02/16 17:09:24 sos Exp $");
#include "opt_ata.h"
#include <sys/param.h>
@@ -100,6 +100,10 @@
static int ata_ite_chipinit(device_t dev);
static void ata_ite_setmode(device_t dev, int mode);
static int ata_jmicron_chipinit(device_t dev);
+static int ata_jmicron_allocate(device_t dev);
+static void ata_jmicron_reset(device_t dev);
+static void ata_jmicron_dmainit(device_t dev);
+static void ata_jmicron_setmode(device_t dev, int mode);
static int ata_marvell_chipinit(device_t dev);
static int ata_marvell_allocate(device_t dev);
static int ata_marvell_status(device_t dev);
@@ -2065,6 +2069,7 @@
struct ata_chip_id *idx;
static struct ata_chip_id ids[] =
{{ ATA_JMB360, 0, 0, 0, ATA_SA300, "JMB360" },
+ { ATA_JMB363, 0, 1, 0, ATA_SA300, "JMB363" },
{ 0, 0, 0, 0, 0, 0}};
char buffer[64];
@@ -2087,49 +2092,110 @@
if (ata_setup_interrupt(dev))
return ENXIO;
+ /* set controller configuration to a setup we support */
+ pci_write_config(dev, 0x40, 0x80c0a131, 4);
+
+ ctlr->allocate = ata_jmicron_allocate;
+ ctlr->reset = ata_jmicron_reset;
+ ctlr->dmainit = ata_jmicron_dmainit;
+ ctlr->setmode = ata_jmicron_setmode;
+
ctlr->r_type2 = SYS_RES_MEMORY;
ctlr->r_rid2 = PCIR_BAR(5);
- if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
- &ctlr->r_rid2, RF_ACTIVE)))
- return ENXIO;
+ if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
+ &ctlr->r_rid2, RF_ACTIVE))) {
+ /* reset AHCI controller */
+ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
+ ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_HR);
+ DELAY(1000000);
+ if (ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) & ATA_AHCI_GHC_HR) {
+ bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2,ctlr->r_res2);
+ device_printf(dev, "AHCI controller reset failure\n");
+ return ENXIO;
+ }
+
+ /* enable AHCI mode */
+ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
+ ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_AE);
+
+ /* get the number of HW channels */
+ ctlr->channels =
+ (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_NPMASK) + 1;
+
+ /* clear interrupts */
+ ATA_OUTL(ctlr->r_res2, ATA_AHCI_IS, ATA_INL(ctlr->r_res2, ATA_AHCI_IS));
+
+ /* enable AHCI interrupts */
+ ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
+ ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_IE);
+
+ /* enable PCI interrupt */
+ pci_write_config(dev, PCIR_COMMAND,
+ pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
+ }
+ /* add in PATA channel(s) */
+ ctlr->channels += ctlr->chip->cfg1;
+ return 0;
+}
- /* enable AHCI mode */
- pci_write_config(dev, 0x41, 0xa1, 1);
+static int
+ata_jmicron_allocate(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(dev);
+ int error;
- /* reset AHCI controller */
- ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
- ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_HR);
- DELAY(1000000);
- if (ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) & ATA_AHCI_GHC_HR) {
- bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
- device_printf(dev, "AHCI controller reset failure\n");
- return ENXIO;
+ if (ch->unit >= 2) {
+ ch->unit -= 2;
+ error = ata_pci_allocate(dev);
+ ch->unit += 2;
}
+ else
+ error = ata_ahci_allocate(dev);
+ return error;
+}
+
+static void
+ata_jmicron_reset(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(dev);
- /* enable AHCI mode */
- ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
- ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_AE);
+ if (ch->unit >= 2)
+ ata_generic_reset(dev);
+ else
+ ata_ahci_reset(dev);
+}
+
+static void
+ata_jmicron_dmainit(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(dev);
- /* get the number of HW channels */
- ctlr->channels = (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_NPMASK) +1;
+ if (ch->unit >= 2)
+ ata_pci_dmainit(dev);
+ else
+ ata_ahci_dmainit(dev);
+}
- ctlr->allocate = ata_ahci_allocate;
- ctlr->reset = ata_ahci_reset;
- ctlr->dmainit = ata_ahci_dmainit;
- ctlr->setmode = ata_sata_setmode;
+static void
+ata_jmicron_setmode(device_t dev, int mode)
+{
+ struct ata_channel *ch = device_get_softc(device_get_parent(dev));
- /* clear interrupts */
- ATA_OUTL(ctlr->r_res2, ATA_AHCI_IS, ATA_INL(ctlr->r_res2, ATA_AHCI_IS));
+ if (ch->unit >= 2) {
+ struct ata_device *atadev = device_get_softc(dev);
- /* enable AHCI interrupts */
- ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
- ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_IE);
+ /* check for 80pin cable present */
+ if (pci_read_config(dev, 0x40, 1) & 0x08)
+ mode = ata_limit_mode(dev, mode, ATA_UDMA2);
+ else
+ mode = ata_limit_mode(dev, mode, ATA_UDMA6);
- /* enable PCI interrupt */
- pci_write_config(dev, PCIR_COMMAND,
- pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
- return 0;
+ if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode))
+ atadev->mode = mode;
+ }
+ else
+ ata_sata_setmode(dev, mode);
}
==== //depot/projects/arm/src/sys/dev/ata/ata-pci.c#7 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.115 2006/02/09 20:53:32 sos Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.116 2006/02/16 17:09:24 sos Exp $");
#include "opt_ata.h"
#include <sys/param.h>
@@ -59,9 +59,6 @@
#define IOMASK 0xfffffffc
#define ATA_PROBE_OK -10
-/* prototypes */
-static void ata_pci_dmainit(device_t);
-
int
ata_legacy(device_t dev)
{
@@ -505,7 +502,7 @@
ch->dma->unload(dev);
}
-static void
+void
ata_pci_dmainit(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
==== //depot/projects/arm/src/sys/dev/ata/ata-pci.h#8 (text+ko) ====
@@ -23,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: src/sys/dev/ata/ata-pci.h,v 1.62 2006/01/25 23:07:42 sos Exp $
+ * $FreeBSD: src/sys/dev/ata/ata-pci.h,v 1.63 2006/02/16 17:09:24 sos Exp $
*/
/* structure holding chipset config info */
@@ -161,6 +161,7 @@
#define ATA_JMICRON_ID 0x197b
#define ATA_JMB360 0x2360197b
+#define ATA_JMB363 0x2363197b
#define ATA_MARVELL_ID 0x11ab
#define ATA_M88SX5040 0x504011ab
@@ -401,6 +402,7 @@
int ata_pci_allocate(device_t dev);
void ata_pci_hw(device_t dev);
int ata_pci_status(device_t dev);
+void ata_pci_dmainit(device_t);
/* global prototypes ata-chipset.c */
==== //depot/projects/arm/src/sys/dev/ata/ata-raid.c#9 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ata/ata-raid.c,v 1.117 2006/01/18 13:10:17 sos Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ata/ata-raid.c,v 1.118 2006/02/17 13:02:09 sos Exp $");
#include "opt_ata.h"
#include <sys/param.h>
@@ -71,6 +71,8 @@
static int ata_raid_intel_read_meta(device_t dev, struct ar_softc **raidp);
static int ata_raid_intel_write_meta(struct ar_softc *rdp);
static int ata_raid_ite_read_meta(device_t dev, struct ar_softc **raidp);
+static int ata_raid_jmicron_read_meta(device_t dev, struct ar_softc **raidp);
+static int ata_raid_jmicron_write_meta(struct ar_softc *rdp);
static int ata_raid_lsiv2_read_meta(device_t dev, struct ar_softc **raidp);
static int ata_raid_lsiv3_read_meta(device_t dev, struct ar_softc **raidp);
static int ata_raid_nvidia_read_meta(device_t dev, struct ar_softc **raidp);
@@ -95,6 +97,7 @@
static void ata_raid_hptv3_print_meta(struct hptv3_raid_conf *meta);
static void ata_raid_intel_print_meta(struct intel_raid_conf *meta);
static void ata_raid_ite_print_meta(struct ite_raid_conf *meta);
+static void ata_raid_jmicron_print_meta(struct jmicron_raid_conf *meta);
static void ata_raid_lsiv2_print_meta(struct lsiv2_raid_conf *meta);
static void ata_raid_lsiv3_print_meta(struct lsiv3_raid_conf *meta);
static void ata_raid_nvidia_print_meta(struct nvidia_raid_conf *meta);
@@ -937,6 +940,11 @@
rdp->disks[disk].sectors = ITE_LBA(rdp->disks[disk].dev);
break;
+ case ATA_JMICRON_ID:
+ ctlr = AR_F_JMICRON_RAID;
+ rdp->disks[disk].sectors = JMICRON_LBA(rdp->disks[disk].dev);
+ break;
+
case 0: /* XXX SOS cover up for bug in our PCI code */
case ATA_PROMISE_ID:
ctlr = AR_F_PROMISE_RAID;
@@ -1072,6 +1080,10 @@
rdp->interleave = min(max(2, rdp->interleave), 128); /*+*/
break;
+ case AR_F_JMICRON_RAID:
+ rdp->interleave = min(max(8, rdp->interleave), 256); /*+*/
+ break;
+
case AR_F_LSIV2_RAID:
rdp->interleave = min(max(2, rdp->interleave), 4096);
break;
@@ -1274,6 +1286,11 @@
return 0;
break;
+ case ATA_JMICRON_ID:
+ if (ata_raid_jmicron_read_meta(subdisk, ata_raid_arrays))
+ return 0;
+ break;
+
case ATA_NVIDIA_ID:
if (ata_raid_nvidia_read_meta(subdisk, ata_raid_arrays))
return 0;
@@ -1339,6 +1356,9 @@
case AR_F_INTEL_RAID:
return ata_raid_intel_write_meta(rdp);
+ case AR_F_JMICRON_RAID:
+ return ata_raid_jmicron_write_meta(rdp);
+
case AR_F_SIS_RAID:
return ata_raid_sis_write_meta(rdp);
@@ -1410,6 +1430,11 @@
size = sizeof(struct ite_raid_conf);
break;
+ case AR_F_JMICRON_RAID:
+ lba = JMICRON_LBA(rdp->disks[disk].dev);
+ size = sizeof(struct jmicron_raid_conf);
+ break;
+
case AR_F_LSIV2_RAID:
lba = LSIV2_LBA(rdp->disks[disk].dev);
size = sizeof(struct lsiv2_raid_conf);
@@ -2392,6 +2417,231 @@
return retval;
}
+/* JMicron Technology Corp Metadata */
+static int
+ata_raid_jmicron_read_meta(device_t dev, struct ar_softc **raidp)
+{
+ struct ata_raid_subdisk *ars = device_get_softc(dev);
+ device_t parent = device_get_parent(dev);
+ struct jmicron_raid_conf *meta;
+ struct ar_softc *raid = NULL;
+ u_int16_t checksum, *ptr;
+ u_int64_t disk_size;
+ int count, array, disk, total_disks, retval = 0;
+
+ if (!(meta = (struct jmicron_raid_conf *)
+ malloc(sizeof(struct jmicron_raid_conf), M_AR, M_NOWAIT | M_ZERO)))
+ return ENOMEM;
+
+ if (ata_raid_rw(parent, JMICRON_LBA(parent),
+ meta, sizeof(struct jmicron_raid_conf), ATA_R_READ)) {
+ if (testing || bootverbose)
+ device_printf(parent,
+ "JMicron read metadata failed\n");
+ }
+
+ /* check for JMicron signature */
+ if (strncmp(meta->signature, JMICRON_MAGIC, 2)) {
+ if (testing || bootverbose)
+ device_printf(parent, "JMicron check1 failed\n");
+ goto jmicron_out;
+ }
+
+ /* calculate checksum and compare for valid */
+ for (checksum = 0, ptr = (u_int16_t *)meta, count = 0; count < 64; count++)
+ checksum += *ptr++;
+ if (checksum) {
+ if (testing || bootverbose)
+ device_printf(parent, "JMicron check2 failed\n");
+ goto jmicron_out;
+ }
+
+ if (testing || bootverbose)
+ ata_raid_jmicron_print_meta(meta);
+
+ /* now convert JMicron meta into our generic form */
+ for (array = 0; array < MAX_ARRAYS; array++) {
+jmicron_next:
+ if (!raidp[array]) {
+ raidp[array] =
+ (struct ar_softc *)malloc(sizeof(struct ar_softc), M_AR,
+ M_NOWAIT | M_ZERO);
+ if (!raidp[array]) {
+ device_printf(parent, "failed to allocate metadata storage\n");
+ goto jmicron_out;
+ }
+ }
+ raid = raidp[array];
+ if (raid->format && (raid->format != AR_F_JMICRON_RAID))
+ continue;
+
+ for (total_disks = 0, disk = 0; disk < JM_MAX_DISKS; disk++) {
+ if (meta->disks[disk]) {
+ if (raid->format == AR_F_JMICRON_RAID) {
+ if (bcmp(&meta->disks[disk],
+ raid->disks[disk].serial, sizeof(u_int32_t))) {
+ array++;
+ goto jmicron_next;
+ }
+ }
+ else
+ bcopy(&meta->disks[disk],
+ raid->disks[disk].serial, sizeof(u_int32_t));
+ total_disks++;
+ }
+ }
+ /* handle spares XXX SOS */
+
+ switch (meta->type) {
+ case JM_T_RAID0:
+ raid->type = AR_T_RAID0;
+ raid->width = total_disks;
+ break;
+
+ case JM_T_RAID1:
+ raid->type = AR_T_RAID1;
+ raid->width = 1;
+ break;
+
+ case JM_T_RAID01:
+ raid->type = AR_T_RAID01;
+ raid->width = total_disks / 2;
+ break;
+
+ case JM_T_RAID5:
+ raid->type = AR_T_RAID5;
+ raid->width = total_disks;
+ break;
+
+ case JM_T_JBOD:
+ raid->type = AR_T_SPAN;
+ raid->width = 1;
+ break;
+
+ default:
+ device_printf(parent,
+ "JMicron unknown RAID type 0x%02x\n", meta->type);
+ free(raidp[array], M_AR);
+ raidp[array] = NULL;
+ goto jmicron_out;
+ }
+ disk_size = (meta->disk_sectors_high << 16) + meta->disk_sectors_low;
+ raid->format = AR_F_JMICRON_RAID;
+ strncpy(raid->name, meta->name, sizeof(meta->name));
+ raid->generation = 0;
+ raid->interleave = 2 << meta->stripe_shift;
+ raid->total_disks = total_disks;
+ raid->total_sectors = disk_size * (raid->width-(raid->type==AR_RAID5));
+ raid->heads = 255;
+ raid->sectors = 63;
+ raid->cylinders = raid->total_sectors / (63 * 255);
+ raid->offset_sectors = meta->offset * 16;
+ raid->rebuild_lba = 0;
+ raid->lun = array;
+
+ for (disk = 0; disk < raid->total_disks; disk++) {
+ if (meta->disks[disk] == meta->disk_id) {
+ raid->disks[disk].dev = parent;
+ raid->disks[disk].sectors = disk_size;
+ raid->disks[disk].flags =
+ (AR_DF_ONLINE | AR_DF_PRESENT | AR_DF_ASSIGNED);
+ ars->raid[raid->volume] = raid;
+ ars->disk_number[raid->volume] = disk;
+ retval = 1;
+ break;
+ }
+ }
+ break;
+ }
+jmicron_out:
+ free(meta, M_AR);
+ return retval;
+}
+
+static int
+ata_raid_jmicron_write_meta(struct ar_softc *rdp)
+{
+ struct jmicron_raid_conf *meta;
+ u_int64_t disk_sectors;
+ int disk, error = 0;
+
+ if (!(meta = (struct jmicron_raid_conf *)
+ malloc(sizeof(struct jmicron_raid_conf), M_AR, M_NOWAIT | M_ZERO))) {
+ printf("ar%d: failed to allocate metadata storage\n", rdp->lun);
+ return ENOMEM;
+ }
+
+ rdp->generation++;
+ switch (rdp->type) {
+ case AR_T_JBOD:
+ meta->type = JM_T_JBOD;
+ break;
+
+ case AR_T_RAID0:
+ meta->type = JM_T_RAID0;
+ break;
+
+ case AR_T_RAID1:
+ meta->type = JM_T_RAID1;
+ break;
+
+ case AR_T_RAID5:
+ meta->type = JM_T_RAID5;
+ break;
+
+ case AR_T_RAID01:
+ meta->type = JM_T_RAID01;
+ break;
+
+ default:
+ free(meta, M_AR);
+ return ENODEV;
+ }
+ bcopy(JMICRON_MAGIC, meta->signature, sizeof(JMICRON_MAGIC));
+ meta->version = JMICRON_VERSION;
+ meta->offset = rdp->offset_sectors / 16;
+ disk_sectors = rdp->total_sectors / (rdp->width - (rdp->type == AR_RAID5));
+ meta->disk_sectors_low = disk_sectors & 0xffff;
+ meta->disk_sectors_high = disk_sectors >> 16;
+ strncpy(meta->name, rdp->name, sizeof(meta->name));
+ meta->stripe_shift = ffs(rdp->interleave) - 2;
+
+ for (disk = 0; disk < rdp->total_disks; disk++) {
+ if (rdp->disks[disk].serial[0])
+ bcopy(rdp->disks[disk].serial,&meta->disks[disk],sizeof(u_int32_t));
+ else
+ meta->disks[disk] = (u_int32_t)(uintptr_t)rdp->disks[disk].dev;
+ }
+
+ for (disk = 0; disk < rdp->total_disks; disk++) {
+ if (rdp->disks[disk].dev) {
+ u_int16_t checksum = 0, *ptr;
+ int count;
+
+ meta->disk_id = meta->disks[disk];
+ meta->checksum = 0;
+ for (ptr = (u_int16_t *)meta, count = 0; count < 64; count++)
+ checksum += *ptr++;
+ meta->checksum -= checksum;
+
+ if (testing || bootverbose)
+ ata_raid_jmicron_print_meta(meta);
+
+ if (ata_raid_rw(rdp->disks[disk].dev,
+ JMICRON_LBA(rdp->disks[disk].dev),
+ meta, sizeof(struct jmicron_raid_conf),
+ ATA_R_WRITE | ATA_R_DIRECT)) {
+ device_printf(rdp->disks[disk].dev, "write metadata failed\n");
+ error = EIO;
+ }
+ }
+ }
+ /* handle spares XXX SOS */
+
+ free(meta, M_AR);
+ return error;
+}
+
/* LSILogic V2 MegaRAID Metadata */
static int
ata_raid_lsiv2_read_meta(device_t dev, struct ar_softc **raidp)
@@ -3600,6 +3850,7 @@
free(meta, M_AR);
return retval;
}
+
static int
ata_raid_via_write_meta(struct ar_softc *rdp)
{
@@ -3931,6 +4182,7 @@
case AR_F_HPTV3_RAID: return "HighPoint v3 RocketRAID";
case AR_F_INTEL_RAID: return "Intel MatrixRAID";
case AR_F_ITE_RAID: return "Integrated Technology Express";
+ case AR_F_JMICRON_RAID: return "JMicron Technology Corp";
case AR_F_LSIV2_RAID: return "LSILogic v2 MegaRAID";
case AR_F_LSIV3_RAID: return "LSILogic v3 MegaRAID";
case AR_F_NVIDIA_RAID: return "nVidia MediaShield";
@@ -4301,6 +4553,48 @@
}
static char *
+ata_raid_jmicron_type(int type)
+{
+ static char buffer[16];
+
+ switch (type) {
+ case JM_T_RAID0: return "RAID0";
+ case JM_T_RAID1: return "RAID1";
+ case JM_T_RAID01: return "RAID0+1";
+ case JM_T_JBOD: return "JBOD";
+ case JM_T_RAID5: return "RAID5";
+ default: sprintf(buffer, "UNKNOWN 0x%02x", type);
+ return buffer;
+ }
+}
+
+static void
+ata_raid_jmicron_print_meta(struct jmicron_raid_conf *meta)
+{
+ int i;
+
+ printf("***** ATA JMicron Technology Corp Metadata ******\n");
+ printf("signature %.2s\n", meta->signature);
+ printf("version 0x%04x\n", meta->version);
+ printf("checksum 0x%04x\n", meta->checksum);
+ printf("disk_id 0x%08x\n", meta->disk_id);
+ printf("offset 0x%08x\n", meta->offset);
+ printf("disk_sectors_low 0x%08x\n", meta->disk_sectors_low);
+ printf("disk_sectors_high 0x%08x\n", meta->disk_sectors_high);
+ printf("name %.16s\n", meta->name);
+ printf("type %s\n", ata_raid_jmicron_type(meta->type));
+ printf("stripe_shift %d\n", meta->stripe_shift);
+ printf("flags 0x%04x\n", meta->flags);
+ printf("spare:\n");
+ for (i=0; i < 2 && meta->spare[i]; i++)
+ printf(" %d 0x%08x\n", i, meta->spare[i]);
+ printf("disks:\n");
+ for (i=0; i < 8 && meta->disks[i]; i++)
+ printf(" %d 0x%08x\n", i, meta->disks[i]);
+ printf("=================================================\n");
+}
+
+static char *
ata_raid_lsiv2_type(int type)
{
static char buffer[16];
==== //depot/projects/arm/src/sys/dev/ata/ata-raid.h#8 (text+ko) ====
@@ -23,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: src/sys/dev/ata/ata-raid.h,v 1.43 2006/01/18 13:10:17 sos Exp $
+ * $FreeBSD: src/sys/dev/ata/ata-raid.h,v 1.44 2006/02/17 13:02:10 sos Exp $
*/
/* misc defines */
@@ -68,13 +68,14 @@
#define AR_F_HPTV3_RAID 0x0008
#define AR_F_INTEL_RAID 0x0010
#define AR_F_ITE_RAID 0x0020
-#define AR_F_LSIV2_RAID 0x0040
-#define AR_F_LSIV3_RAID 0x0080
-#define AR_F_NVIDIA_RAID 0x0100
-#define AR_F_PROMISE_RAID 0x0200
-#define AR_F_SII_RAID 0x0400
-#define AR_F_SIS_RAID 0x0800
-#define AR_F_VIA_RAID 0x1000
+#define AR_F_JMICRON_RAID 0x0040
+#define AR_F_LSIV2_RAID 0x0080
+#define AR_F_LSIV3_RAID 0x0100
+#define AR_F_NVIDIA_RAID 0x0200
+#define AR_F_PROMISE_RAID 0x0400
+#define AR_F_SII_RAID 0x0800
+#define AR_F_SIS_RAID 0x1000
+#define AR_F_VIA_RAID 0x2000
#define AR_F_FORMAT_MASK 0x1fff
u_int generation;
@@ -398,6 +399,50 @@
} __packed;
+/* JMicron Technology Corp Metadata */
+#define JMICRON_LBA(dev) \
+ (((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
+#define JM_MAX_DISKS 8
+
+struct jmicron_raid_conf {
+ u_int8_t signature[2];
+#define JMICRON_MAGIC "JM"
+
+ u_int16_t version;
+#define JMICRON_VERSION 0x0001
+
+ u_int16_t checksum;
+ u_int8_t filler_1[10];
+ u_int32_t disk_id;
+ u_int32_t offset;
+ u_int32_t disk_sectors_high;
+ u_int16_t disk_sectors_low;
+ u_int8_t filler_2[2];
+ u_int8_t name[16];
+ u_int8_t type;
+#define JM_T_RAID0 0
+#define JM_T_RAID1 1
+#define JM_T_RAID01 2
+#define JM_T_JBOD 3
+#define JM_T_RAID5 5
+
+ u_int8_t stripe_shift;
+ u_int16_t flags;
+#define JM_F_READY 0x0001
+#define JM_F_BOOTABLE 0x0002
+#define JM_F_BAD 0x0004
+#define JM_F_ACTIVE 0c0010
+#define JM_F_UNSYNC 0c0020
+#define JM_F_NEWEST 0c0040
+
+ u_int8_t filler_3[4];
+ u_int32_t spare[2];
+ u_int32_t disks[JM_MAX_DISKS];
+ u_int8_t filler_4[32];
+ u_int8_t filler_5[384];
+};
+
+
/* LSILogic V2 MegaRAID Metadata */
#define LSIV2_LBA(dev) \
(((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
==== //depot/projects/arm/src/sys/dev/bge/if_bge.c#11 (text+ko) ====
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/bge/if_bge.c,v 1.123 2006/02/02 09:58:31 oleg Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/bge/if_bge.c,v 1.124 2006/02/17 14:33:35 oleg Exp $");
/*
* Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
@@ -3382,6 +3382,7 @@
return(0);
}
+ sc->bge_link_evt++;
mii = device_get_softc(sc->bge_miibus);
if (mii->mii_instance) {
struct mii_softc *miisc;
@@ -3682,9 +3683,17 @@
sc->bge_tx_saved_considx = BGE_TXCONS_UNSET;
+ /*
+ * We can't just call bge_link_upd() cause chip is almost stopped so
+ * bge_link_upd -> bge_tick_locked -> bge_stats_update sequence may
+ * lead to hardware deadlock. So we just clearing MAC's link state
+ * (PHY may still have link UP).
+ */
+ if (bootverbose && sc->bge_link)
+ if_printf(sc->bge_ifp, "link DOWN\n");
+ sc->bge_link = 0;
+
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-
- return;
}
/*
@@ -3817,7 +3826,8 @@
if_printf(sc->bge_ifp, "link DOWN\n");
if_link_state_change(sc->bge_ifp, LINK_STATE_DOWN);
}
- } else {
+ /* Discard link events for MII/GMII cards if MI auto-polling disabled */
+ } else if (CSR_READ_4(sc, BGE_MI_MODE) & BGE_MIMODE_AUTOPOLL) {
/*
* Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit
* in status word always set. Workaround this bug by reading
@@ -3847,7 +3857,7 @@
}
}
- /* Clear the interrupt */
+ /* Clear the attention */
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE|
BGE_MACSTAT_LINK_CHANGED);
==== //depot/projects/arm/src/sys/dev/ichwd/ichwd.c#2 (text+ko) ====
@@ -54,7 +54,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ichwd/ichwd.c,v 1.5 2005/01/06 01:42:45 imp Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ichwd/ichwd.c,v 1.6 2006/02/17 18:46:18 ambrisko Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -81,43 +81,51 @@
{ VENDORID_INTEL, DEVICEID_82801DBM, "Intel 82801DBM watchdog timer" },
{ VENDORID_INTEL, DEVICEID_82801E, "Intel 82801E watchdog timer" },
{ VENDORID_INTEL, DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer" },
+ { VENDORID_INTEL, DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer" },
+ { VENDORID_INTEL, DEVICEID_ICH5, "Intel ICH5 watchdog timer"},
+ { VENDORID_INTEL, DEVICEID_6300ESB, "Intel 6300ESB watchdog timer"},
{ 0, 0, NULL },
};
static devclass_t ichwd_devclass;
-#define ichwd_read_1(sc, off) \
- bus_space_read_1((sc)->smi_bst, (sc)->smi_bsh, (off))
-#define ichwd_read_2(sc, off) \
- bus_space_read_2((sc)->smi_bst, (sc)->smi_bsh, (off))
-#define ichwd_read_4(sc, off) \
+#define ichwd_read_tco_1(sc, off) \
+ bus_space_read_1((sc)->tco_bst, (sc)->tco_bsh, (off))
+#define ichwd_read_tco_2(sc, off) \
+ bus_space_read_2((sc)->tco_bst, (sc)->tco_bsh, (off))
+#define ichwd_read_tco_4(sc, off) \
+ bus_space_read_4((sc)->tco_bst, (sc)->tco_bsh, (off))
+
+#define ichwd_write_tco_1(sc, off, val) \
+ bus_space_write_1((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
+#define ichwd_write_tco_2(sc, off, val) \
+ bus_space_write_2((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
+#define ichwd_write_tco_4(sc, off, val) \
+ bus_space_write_4((sc)->tco_bst, (sc)->tco_bsh, (off), (val))
+
+#define ichwd_read_smi_4(sc, off) \
bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off))
-
-#define ichwd_write_1(sc, off, val) \
- bus_space_write_1((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
-#define ichwd_write_2(sc, off, val) \
- bus_space_write_2((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
-#define ichwd_write_4(sc, off, val) \
+#define ichwd_write_smi_4(sc, off, val) \
bus_space_write_4((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
static __inline void
ichwd_intr_enable(struct ichwd_softc *sc)
{
- ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) | SMI_TCO_EN);
+ ichwd_write_smi_4(sc, SMI_EN, ichwd_read_smi_4(sc, SMI_EN) & ~SMI_TCO_EN);
}
static __inline void
ichwd_intr_disable(struct ichwd_softc *sc)
{
- ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) & ~SMI_TCO_EN);
+ ichwd_write_smi_4(sc, SMI_EN, ichwd_read_smi_4(sc, SMI_EN) | SMI_TCO_EN);
}
static __inline void
ichwd_sts_reset(struct ichwd_softc *sc)
{
- ichwd_write_2(sc, TCO1_STS, TCO_TIMEOUT);
- ichwd_write_2(sc, TCO2_STS, TCO_BOOT_STS);
- ichwd_write_2(sc, TCO2_STS, TCO_SECOND_TO_STS);
+ ichwd_write_tco_2(sc, TCO1_STS, TCO_TIMEOUT);
+ ichwd_write_tco_2(sc, TCO2_STS, TCO_BOOT_STS);
+ ichwd_write_tco_2(sc, TCO2_STS, TCO_SECOND_TO_STS);
}
static __inline void
@@ -125,8 +133,8 @@
{
uint16_t cnt;
- cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
- ichwd_write_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT);
+ cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
+ ichwd_write_tco_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT);
sc->active = 1;
if (bootverbose)
device_printf(sc->device, "timer enabled\n");
@@ -137,8 +145,8 @@
{
uint16_t cnt;
- cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
- ichwd_write_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT);
+ cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
+ ichwd_write_tco_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT);
sc->active = 0;
if (bootverbose)
device_printf(sc->device, "timer disabled\n");
@@ -147,7 +155,7 @@
static __inline void
ichwd_tmr_reload(struct ichwd_softc *sc)
{
- ichwd_write_1(sc, TCO_RLD, 1);
+ ichwd_write_tco_1(sc, TCO_RLD, 1);
if (bootverbose)
device_printf(sc->device, "timer reloaded\n");
}
@@ -155,7 +163,7 @@
static __inline void
ichwd_tmr_set(struct ichwd_softc *sc, uint8_t timeout)
{
- ichwd_write_1(sc, TCO_TMR, timeout);
+ ichwd_write_tco_1(sc, TCO_TMR, timeout);
sc->timeout = timeout;
if (bootverbose)
device_printf(sc->device, "timeout set to %u ticks\n", timeout);
@@ -170,10 +178,9 @@
struct ichwd_softc *sc = arg;
unsigned int timeout;
- cmd &= WD_INTERVAL;
/* disable / enable */
- if (cmd == 0) {
+ if (!(cmd & WD_ACTIVE)) {
if (sc->active)
ichwd_tmr_disable(sc);
*error = 0;
@@ -182,6 +189,7 @@
if (!sc->active)
ichwd_tmr_enable(sc);
+ cmd &= WD_INTERVAL;
/* convert from power-of-to-ns to WDT ticks */
if (cmd >= 64) {
*error = EINVAL;
@@ -204,7 +212,7 @@
return;
}
-static unsigned long pmbase;
+static unsigned int pmbase = 0;
/*
* Look for an ICH LPC interface bridge. If one is found, register an
@@ -268,27 +276,34 @@
sc = device_get_softc(dev);
sc->device = dev;
+ if (pmbase == 0) {
+ printf("Not found\n");
+ }
+
/* allocate I/O register space */
+ sc->smi_rid = 0;
sc->smi_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->smi_rid,
- pmbase + SMI_BASE, pmbase + SMI_BASE + SMI_LEN - 1, SMI_LEN,
- RF_ACTIVE|RF_SHAREABLE);
+ pmbase + SMI_BASE, ~0ul, SMI_LEN,
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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