PERFORCE change 91852 for review
Warner Losh
imp at FreeBSD.org
Wed Feb 15 16:30:17 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=91852
Change 91852 by imp at imp_Speedy on 2006/02/16 00:29:30
Checkpoint start of pmc driver. Need to init clocks still.
Affected files ...
.. //depot/projects/arm/src/sys/arm/at91/at91_pmc.c#2 edit
.. //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#14 edit
Differences ...
==== //depot/projects/arm/src/sys/arm/at91/at91_pmc.c#2 (text+ko) ====
@@ -43,173 +43,64 @@
#include <machine/intr.h>
#include <arm/at91/at91rm92reg.h>
#include <arm/at91/at91var.h>
-#include <arm/at91/at91_streg.h>
+#include <arm/at91/at91_pmcreg.h>
-static struct at91st_softc {
+static struct at91pmc_softc {
bus_space_tag_t sc_st;
bus_space_handle_t sc_sh;
device_t dev;
-} *timer_softc;
+} *pmc_softc;
#define RD4(off) \
- bus_space_read_4(timer_softc->sc_st, timer_softc->sc_sh, (off))
+ bus_space_read_4(pmc_softc->sc_st, pmc_softc->sc_sh, (off))
#define WR4(off, val) \
- bus_space_write_4(timer_softc->sc_st, timer_softc->sc_sh, (off), (val))
-
-static inline int
-st_crtr(void)
-{
- int cur1, cur2;
- do {
- cur1 = RD4(ST_CRTR);
- cur2 = RD4(ST_CRTR);
- } while (cur1 != cur2);
- return (cur1);
-}
-
-static unsigned at91st_get_timecount(struct timecounter *tc);
+ bus_space_write_4(pmc_softc->sc_st, pmc_softc->sc_sh, (off), (val))
-static struct timecounter at91st_timecounter = {
- at91st_get_timecount, /* get_timecount */
- NULL, /* no poll_pps */
- 0xfffffu, /* counter_mask */
- 32768, /* frequency */
- "AT91RM9200 timer", /* name */
- 0 /* quality */
-};
-
static int
-at91st_probe(device_t dev)
+at91pmc_probe(device_t dev)
{
- device_set_desc(dev, "ST");
+ device_set_desc(dev, "PMC");
return (0);
}
static int
-at91st_attach(device_t dev)
+at91pmc_attach(device_t dev)
{
struct at91_softc *sc = device_get_softc(device_get_parent(dev));
- timer_softc = device_get_softc(dev);
- timer_softc->sc_st = sc->sc_st;
- timer_softc->dev = dev;
- if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_ST_BASE,
- AT91RM92_ST_SIZE, &timer_softc->sc_sh) != 0)
+ pmc_softc = device_get_softc(dev);
+ pmc_softc->sc_st = sc->sc_st;
+ pmc_softc->dev = dev;
+ if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_PMC_BASE,
+ AT91RM92_PMC_SIZE, &pmc_softc->sc_sh) != 0)
panic("couldn't subregion timer registers");
- /*
- * Real time counter increments every clock cycle, need to set before
- * initializing clocks so that DELAY works.
- */
- WR4(ST_RTMR, 1);
+ printf("SCSR: %x\n", RD4(PMC_SCSR));
+ WR4(PMC_PCER, 0xffffffff);
+ printf("PCSR: %x\n", RD4(PMC_PCSR));
+ printf("MOR: %x\n", RD4(CKGR_MOR));
+ printf("PLLA: %x\n", RD4(CKGR_PLLAR));
+ printf("PLLB: %x\n", RD4(CKGR_PLLBR));
+ printf("MCFR: %x\n", RD4(CKGR_MCFR));
+ printf("MCFR: %x\n", RD4(CKGR_MCFR));
+ printf("MCFR: %x\n", RD4(CKGR_MCFR));
+ printf("MCKR: %x\n", RD4(PMC_MCKR));
+ printf("SR: %x\n", RD4(PMC_SR));
return (0);
}
-static device_method_t at91st_methods[] = {
- DEVMETHOD(device_probe, at91st_probe),
- DEVMETHOD(device_attach, at91st_attach),
+static device_method_t at91pmc_methods[] = {
+ DEVMETHOD(device_probe, at91pmc_probe),
+ DEVMETHOD(device_attach, at91pmc_attach),
{0, 0},
};
-static driver_t at91st_driver = {
- "at91_st",
- at91st_methods,
- sizeof(struct at91st_softc),
+static driver_t at91pmc_driver = {
+ "at91_pmc",
+ at91pmc_methods,
+ sizeof(struct at91pmc_softc),
};
-static devclass_t at91st_devclass;
+static devclass_t at91pmc_devclass;
-DRIVER_MODULE(at91_st, atmelarm, at91st_driver, at91st_devclass, 0, 0);
-
-static unsigned
-at91st_get_timecount(struct timecounter *tc)
-{
- return (st_crtr());
-}
-
-static void
-clock_intr(void *arg)
-{
- struct trapframe *fp = arg;
-
- /* The interrupt is shared, so we have to make sure it's for us. */
- if (RD4(ST_SR) & ST_SR_PITS)
- hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
-}
-
-void
-cpu_initclocks(void)
-{
- int rel_value;
- struct resource *irq;
- int rid = 0;
- void *ih;
- device_t dev = timer_softc->dev;
-
- if (32768 % hz) {
- printf("Cannot get %d Hz clock; using 128Hz\n", hz);
- hz = 128;
- }
- rel_value = 32768 / hz;
- /* Disable all interrupts. */
- WR4(ST_IDR, 0xffffffff);
- /* The system timer shares the system irq (1) */
- irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1,
- RF_ACTIVE | RF_SHAREABLE);
- if (!irq)
- panic("Unable to allocate irq for the system timer");
- else
- bus_setup_intr(dev, irq, INTR_TYPE_CLK | INTR_FAST,
- clock_intr, NULL, &ih);
-
- WR4(ST_PIMR, rel_value);
-
- /* Enable PITS interrupts. */
- WR4(ST_IER, ST_SR_PITS);
- tc_init(&at91st_timecounter);
-}
-
-void
-DELAY(int n)
-{
- uint32_t start, end, cur;
-
- start = st_crtr();
- n = (n * 1000000) / 32768;
- if (n <= 0)
- n = 1;
- end = (start + n) & ST_CRTR_MASK;
- cur = start;
- if (start > end) {
- while (cur >= start || cur < end)
- cur = st_crtr();
- } else {
- while (cur < end)
- cur = st_crtr();
- }
-}
-
-void
-cpu_reset(void)
-{
- /*
- * Reset the CPU by programmig the watchdog timer to reset the
- * CPU after 128 'slow' clocks, or about ~4ms. Loop until
- * the reset happens for safety.
- */
- WR4(ST_WDMR, ST_WDMR_RSTEN | 2);
- WR4(ST_CR, ST_CR_WDRST);
- while (1)
- continue;
-}
-
-void
-cpu_startprofclock(void)
-{
-}
-
-void
-cpu_stopprofclock(void)
-{
-}
-
+DRIVER_MODULE(at91_pmc, atmelarm, at91pmc_driver, at91pmc_devclass, 0, 0);
==== //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#14 (text+ko) ====
@@ -203,6 +203,9 @@
#define PIOD_OWDR (0xa00 + 164) /* Output write disable register */
#define PIOD_OWSR (0xa00 + 168) /* Output write status register */
+#define AT91RM92_PMC_BASE 0xffffd00
+#define AT91RM92_PMC_SIZE 0xc00
+
/* IRQs : */
/*
* 0: AIC
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