PERFORCE change 91824 for review
Kip Macy
kmacy at FreeBSD.org
Wed Feb 15 11:42:18 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=91824
Change 91824 by kmacy at kmacy_storage:sun4v_work on 2006/02/15 19:41:58
close inspection of the US 2005 documentation shows that key pieces of information are either
wrong or missing
use opensolaris' trap_table.s as guidance for missing bits
Affected files ...
.. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#5 edit
Differences ...
==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#5 (text+ko) ====
@@ -483,11 +483,23 @@
.endr
.endm
- .macro tl0_insn_excptn
+ .macro insn_excptn
+ .align 32
+ .endm
+
+ .macro insn_miss
+ .align 32
+ .endm
+
+ .macro data_excptn
+ .align 32
+ .endm
+
+ .macro data_miss
.align 32
.endm
- .macro tl0_data_excptn
+ .macro data_prot
.align 32
.endm
@@ -511,22 +523,72 @@
.align 32
.endm
- .macro spill_n_normal type
- .align 32
+ .macro spill_32bit_asi asi target
+ .align 128
+ .endm
+
+ .macro spill_64bit_asi asi target
+ .align 128
+ .endm
+
+ .macro spill_32bit target
+ .align 128
+ .endm
+
+ .macro spill_64bit target
+ .align 128
+ .endm
+
+ .macro spill_64bit_ktt1 target
+ .align 128
+ .endm
+
+ .macro spill_mixed_ktt1 target
+ .align 128
+ .endm
+
+ .macro spill_32bit_tt1 asi target
+ .align 128
+ .endm
+
+ .macro spill_64bit_tt1 asi target
+ .align 128
.endm
- .macro spill_n_other type
- .align 32
+ .macro spill_32clean asi target
+ .align 128
.endm
- .macro fill_n_normal type
- .align 32
+ .macro spill_64clean asi target
+ .align 128
.endm
- .macro fill_n_other type
- .align 32
+ .macro spill_mixed
+ .align 128
.endm
+
+
+ .macro fill_32bit_asi asi target
+ .align 128
+ .endm
+
+ .macro fill_64bit_asi asi target
+ .align 128
+ .endm
+
+ .macro fill_32bit target
+ .align 128
+ .endm
+
+ .macro fill_64bit target
+ .align 128
+ .endm
+
+ .macro fill_mixed
+ .align 128
+ .endm
+
ENTRY(tl0_sfsr_trap)
tl0_split
@@ -1688,8 +1750,10 @@
tl0_base:
tl0_reserved 8 ! 0x0-0x7
tl0_insn_excptn:
- tl0_insn_excptn ! 0x8
- tl0_reserved 7 ! 0x9-0xf
+ insn_excptn ! 0x8
+tl0_insn_miss:
+ insn_miss ! 0x9
+ tl0_reserved 6 ! 0xa-0xf
tl0_insn_illegal:
tl0_gen T_ILLEGAL_INSTRUCTION ! 0x10
tl0_priv_opcode:
@@ -1709,8 +1773,10 @@
tl0_gen T_DIVISION_BY_ZERO ! 0x28
tl0_reserved 7 ! 0x29-0x2f
tl0_data_excptn:
- tl0_data_excptn ! 0x30
- tl0_reserved 3 ! 0x31-0x33
+ data_excptn ! 0x30
+tl0_data_miss:
+ data_miss ! 0x31
+ tl0_reserved 2 ! 0x32-0x33
tl0_align:
tl0_align ! 0x34
tl0_align_lddf:
@@ -1725,7 +1791,10 @@
tl0_reserved 18 ! 0x50-0x61
tl0_watch_virt:
tl0_gen T_VA_WATCHPOINT ! 0x62
- tl0_reserved 19 ! 0x63-0x75
+ tl0_reserved 10 ! 0x63-0x6c
+tl0_data_prot:
+ data_prot ! 0x6c
+ tl0_reserved 8 ! 0x6d-0x75
tl0_breakpoint:
tl0_gen T_BREAKPOINT ! 0x76
tl0_reserved 5 ! 0x77-0x7b
@@ -1738,47 +1807,35 @@
tl0_unresumable_error:
unresumable_error ! 0x7f
tl0_spill_n_normal:
- spill_n_normal T_SPILL_0 ! 0x80
- spill_n_normal T_SPILL_1 ! 0x84
- spill_n_normal T_SPILL_2 ! 0x88
- spill_n_normal T_SPILL_3 ! 0x8c
- spill_n_normal T_SPILL_4 ! 0x90
- spill_n_normal T_SPILL_5 ! 0x94
- spill_n_normal T_SPILL_6 ! 0x98
- spill_n_normal T_SPILL_7 ! 0x9c
- tl0_reserved 3 ! 0x9d-0x9f
+ tl0_reserved 4 ! 0x80
+ spill_32bit_asi ASI_AIUP sn0 ! 0x84
+ spill_64bit_asi ASI_AIUP sn0 ! 0x88
+ spill_32clean ASI_AIUP sn0 ! 0x8c
+ spill_64clean ASI_AIUP sn0 ! 0x90
+ spill_32bit not ! 0x94
+ spill_64bit not ! 0x98
+ spill_mixed ! 0x9c
tl0_spill_n_other:
- spill_n_other T_SPILL_0 ! 0xa0
- spill_n_other T_SPILL_1 ! 0xa4
- spill_n_other T_SPILL_2 ! 0xa8
- spill_n_other T_SPILL_3 ! 0xac
- spill_n_other T_SPILL_4 ! 0xb0
- spill_n_other T_SPILL_5 ! 0xb4
- spill_n_other T_SPILL_6 ! 0xb8
- spill_n_other T_SPILL_7 ! 0xbc
- tl0_reserved 3 ! 0xbd-0xbf
+ tl0_reserved 4 ! 0xa0
+ spill_32bit_asi ASI_AIUS so0 ! 0xa4
+ spill_64bit_asi ASI_AIUS so0 ! 0xa8
+ spill_32bit_asi ASI_AIUS so0 ! 0xac
+ spill_64bit_asi ASI_AIUS so0 ! 0xb0
+ tl0_reserved 12 ! 0xb4-0xbf
tl0_fill_n_normal:
- fill_n_normal T_FILL_0 ! 0xc0
- fill_n_normal T_FILL_1 ! 0xc4
- fill_n_normal T_FILL_2 ! 0xc8
- fill_n_normal T_FILL_3 ! 0xcc
- fill_n_normal T_FILL_4 ! 0xd0
- fill_n_normal T_FILL_5 ! 0xd4
- fill_n_normal T_FILL_6 ! 0xd8
- fill_n_normal T_FILL_7 ! 0xdc
- tl0_reserved 3 ! 0xdd-0xdf
+ tl0_reserved 4 ! 0xa0
+ fill_32bit_asi ASI_AIUP fn0 ! 0xc4
+ fill_64bit_asi ASI_AIUP fn0 ! 0xc8
+ fill_32bit_asi ASI_AIUP fn0 ! 0xcc
+ fill_64bit_asi ASI_AIUP fn0 ! 0xd0
+ fill_32bit not ! 0xd4
+ fill_64bit not ! 0xd8
+ fill_mixed ! 0xdc
tl0_fill_n_other:
- fill_n_other T_FILL_0 ! 0xe0
- fill_n_other T_FILL_1 ! 0xe4
- fill_n_other T_FILL_2 ! 0xe8
- fill_n_other T_FILL_3 ! 0xec
- fill_n_other T_FILL_4 ! 0xf0
- fill_n_other T_FILL_5 ! 0xf4
- fill_n_other T_FILL_6 ! 0xf8
- fill_n_other T_FILL_7 ! 0xfc
- tl0_reserved 3 ! 0xfd-0xff
+ tl0_reserved 32 ! 0xe0-0xff
tl0_soft:
tl0_gen T_SYSCALL ! 0x100
+ tl0_gen T_BREAKPOINT ! 0x101
tl0_gen T_DIVISION_BY_ZERO ! 0x102
tl0_reserved 1 ! 0x103
tl0_gen T_CLEAN_WINDOW ! 0x104
@@ -1806,105 +1863,52 @@
tl0_gen T_TRAP_INSTRUCTION_30 ! 0x11e
tl0_gen T_TRAP_INSTRUCTION_31 ! 0x11f
tl0_reserved 32 ! 0x120-0x13f
- tl0_gen T_SYSCALL ! 0x140
+ tl0_gen T_SYSCALL ! 0x140 LP64 system call
tl0_syscall ! 0x141
tl0_gen T_SYSCALL ! 0x142
tl0_gen T_SYSCALL ! 0x143
tl0_reserved 188 ! 0x144-0x1ff
tll_base:
- tl1_reserved 8 ! 0x200-0x207
-tll_insn_excptn:
- tl1_insn_excptn ! 0x208
- tl1_reserved 7 ! 0x209-0x20f
-tl1_insn_illegal:
- tl1_gen T_ILLEGAL_INSTRUCTION ! 0x210
-tl1_priv_opcode:
- tl1_gen T_PRIVILEGED_OPCODE ! 0x211
- tl1_reserved 14 ! 0x212-0x21f
-tl1_fp_disabled:
- tl1_gen T_FP_DISABLED ! 0x220
-tl1_fp_ieee:
- tl1_gen T_FP_EXCEPTION_IEEE_754 ! 0x221
-tl1_fp_other:
- tl1_gen T_FP_EXCEPTION_OTHER ! 0x222
-tl1_tag_ovflw:
- tl1_gen T_TAG_OVERFLOW ! 0x223
+ tl1_reserved 9 ! 0x200-0x208
+tll_insn_miss:
+ insn_miss ! 0x209
+ tl1_reserved 27 ! 0x20a-0x224
tl1_clean_window:
clean_window ! 0x224
tl1_divide:
- tl1_gen T_DIVISION_BY_ZERO ! 0x228
- tl1_reserved 7 ! 0x229-0x22f
+ tl1_reserved 8 ! 0x228-0x22f
tl1_data_excptn:
tl1_data_excptn ! 0x230
- tl1_reserved 3 ! 0x231-0x233
+ data_miss ! 0x231
+ tl1_reserved 2 ! 0x232-0x233
tl1_align:
tl1_align ! 0x234
-tl1_align_lddf:
- tl1_gen T_RESERVED ! 0x235
-tl1_align_stdf:
- tl1_gen T_RESERVED ! 0x236
-tl1_priv_action:
- tl1_gen T_PRIVILEGED_ACTION ! 0x237
- tl1_reserved 9 ! 0x238-0x240
-tl1_intr_level:
- tl1_intr_level ! 0x241-0x24f
- tl1_reserved 18 ! 0x250-0x261
-tl1_watch_virt:
- tl1_gen T_VA_WATCHPOINT ! 0x262
- tl1_reserved 19 ! 0x,63-0x275
-tl1_breakpoint:
- tl1_gen T_BREAKPOINT ! 0x276
- tl1_reserved 5 ! 02x77-0x27b
-tl1_cpu_mondo:
- cpu_mondo ! 0x27c
-tl1_dev_mondo:
- dev_mondo ! 0x27d
-tl1_resumable_error:
- resumable_error ! 0x27e
+ tl1_reserved 55 ! 0x235-0x26b
+tl1_data_prot:
+ data_prot ! 0x26c
+ tl1_reserved 18 ! 0x26c-0x27e
tl1_unresumable_error:
unresumable_error ! 0x27f
tl1_spill_n_normal:
- spill_n_normal T_SPILL_0 ! 0x280
- spill_n_normal T_SPILL_1 ! 0x284
- spill_n_normal T_SPILL_2 ! 0x288
- spill_n_normal T_SPILL_3 ! 0x28c
- spill_n_normal T_SPILL_4 ! 0x290
- spill_n_normal T_SPILL_5 ! 0x294
- spill_n_normal T_SPILL_6 ! 0x298
- spill_n_normal T_SPILL_7 ! 0x29c
- tl1_reserved 3 ! 0x29d-0x29f
+ tl1_reserved 4 ! 0x280
+ spill_32bit_tt1 ASI_AIUP sn1 ! 0x284
+ spill_64bit_tt1 ASI_AIUP sn1 ! 0x288
+ spill_32bit_tt1 ASI_AIUP sn1 ! 0x28c
+ spill_32bit_tt1 ASI_AIUP sn1 ! 0x290
+ tl1_reserved ! 0x294
+ spill_64bit_ktt1 sk ! 0x298
+ spill_mixed_ktt1 sk ! 0x29c
tl1_spill_n_other:
- spill_n_other T_SPILL_0 ! 0x2a0
- spill_n_other T_SPILL_1 ! 0x2a4
- spill_n_other T_SPILL_2 ! 0x2a8
- spill_n_other T_SPILL_3 ! 0x2ac
- spill_n_other T_SPILL_4 ! 0x2b0
- spill_n_other T_SPILL_5 ! 0x2b4
- spill_n_other T_SPILL_6 ! 0x2b8
- spill_n_other T_SPILL_7 ! 0x2bc
- tl1_reserved 3 ! 0x2bd-0x2bf
+ tl1_reserved 4 ! 0x2a0
+ spill_32bit_tt1 ASI_AIUS so1 ! 0x2a4
+ spill_64bit_tt1 ASI_AIUS so1 ! 0x2a8
+ spill_32bit_tt1 ASI_AIUS so1 ! 0x2ac
+ spill_64bit_tt1 ASI_AIUS so1 ! 0x2b0
+ tl1_reserved 12 ! 0x2b4-0x2bf
tl1_fill_n_normal:
- fill_n_normal T_FILL_0 ! 0x2c0
- fill_n_normal T_FILL_1 ! 0x2c4
- fill_n_normal T_FILL_2 ! 0x2c8
- fill_n_normal T_FILL_3 ! 0x2cc
- fill_n_normal T_FILL_4 ! 0x2d0
- fill_n_normal T_FILL_5 ! 0x2d4
- fill_n_normal T_FILL_6 ! 0x2d8
- fill_n_normal T_FILL_7 ! 0x2dc
- tl1_reserved 3 ! 0x2dd-0x2df
+ tl1_reserved 32 ! 0x2c0-0x2df
tl1_fill_n_other:
- fill_n_other T_FILL_0 ! 0x2e0
- fill_n_other T_FILL_1 ! 0x2e4
- fill_n_other T_FILL_2 ! 0x2e8
- fill_n_other T_FILL_3 ! 0x2ec
- fill_n_other T_FILL_4 ! 0x2f0
- fill_n_other T_FILL_5 ! 0x2f4
- fill_n_other T_FILL_6 ! 0x2f8
- fill_n_other T_FILL_7 ! 0x2fc
- tl1_reserved 3 ! 0x2fd-0x2ff
-tl1_soft:
- tl1_reserved 256 ! 0x300-0x3ff
+ tl1_reserved 32 ! 0x2e0-0x2ff
/*
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