PERFORCE change 91596 for review
Warner Losh
imp at FreeBSD.org
Sat Feb 11 15:52:47 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=91596
Change 91596 by imp at imp_harmony on 2006/02/11 23:52:09
IFC @91593 (mostly loopback from current)
Affected files ...
.. //depot/projects/arm/src/sys/alpha/alpha/trap.c#4 integrate
.. //depot/projects/arm/src/sys/amd64/amd64/trap.c#7 integrate
.. //depot/projects/arm/src/sys/amd64/amd64/tsc.c#2 integrate
.. //depot/projects/arm/src/sys/amd64/ia32/ia32_syscall.c#4 integrate
.. //depot/projects/arm/src/sys/arm/arm/trap.c#7 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91.c#5 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_spi.c#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_spiio.h#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_spireg.h#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_st.c#3 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_streg.h#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_twi.c#5 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_twiio.h#3 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_twireg.h#5 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91_usartreg.h#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#13 integrate
.. //depot/projects/arm/src/sys/arm/at91/at91var.h#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/files.at91rm92#10 integrate
.. //depot/projects/arm/src/sys/arm/at91/files.kb920x#3 integrate
.. //depot/projects/arm/src/sys/arm/at91/if_ate.c#28 integrate
.. //depot/projects/arm/src/sys/arm/at91/if_atereg.h#6 integrate
.. //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c#15 integrate
.. //depot/projects/arm/src/sys/arm/at91/std.at91rm92#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/std.kb920x#2 integrate
.. //depot/projects/arm/src/sys/arm/at91/uart_bus_at91usart.c#5 integrate
.. //depot/projects/arm/src/sys/arm/at91/uart_cpu_at91rm9200usart.c#7 integrate
.. //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#10 integrate
.. //depot/projects/arm/src/sys/arm/conf/KB920X#17 integrate
.. //depot/projects/arm/src/sys/arm/conf/SKYEYE#3 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/COPYRIGHT#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/README#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/ah_desc.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/ah_devid.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/freebsd/ah_if.m#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/freebsd/ah_osdep.c#3 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/freebsd/ah_osdep.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/alpha-elf.hal.o.uu#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/alpha-elf.inc#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/alpha-elf.opt_ah.h#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/arm9-le-thumb-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/arm9-le-thumb-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/arm9-le-thumb-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-be-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-be-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-be-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/armv4-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/i386-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/i386-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/i386-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-be-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-be-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-be-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-be-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-be-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-be-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mips1-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-be-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-be-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-be-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/mipsisa32-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-eabi.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-eabi.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-eabi.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-elf.hal.o.uu#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-elf.inc#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-be-elf.opt_ah.h#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-le-eabi.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-le-eabi.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/powerpc-le-eabi.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sh4-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sh4-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sh4-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sparc64-be-elf.hal.o.uu#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sparc64-be-elf.inc#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/sparc64-be-elf.opt_ah.h#1 branch
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/x86_64-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/x86_64-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/x86_64-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-be-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-be-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-be-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-le-elf.hal.o.uu#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-le-elf.inc#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/public/xscale-le-elf.opt_ah.h#2 integrate
.. //depot/projects/arm/src/sys/contrib/dev/ath/version.h#2 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-all.c#6 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-all.h#8 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-chipset.c#11 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-pci.c#6 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/amrr/amrr.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/onoe/onoe.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/sample/sample.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ath/ath_rate/sample/sample.h#3 integrate
.. //depot/projects/arm/src/sys/dev/ath/if_ath.c#5 integrate
.. //depot/projects/arm/src/sys/dev/ath/if_athioctl.h#4 integrate
.. //depot/projects/arm/src/sys/dev/ath/if_athvar.h#4 integrate
.. //depot/projects/arm/src/sys/dev/cs/if_csvar.h#3 integrate
.. //depot/projects/arm/src/sys/dev/em/if_em.c#14 integrate
.. //depot/projects/arm/src/sys/dev/ipmi/ipmi.c#1 branch
.. //depot/projects/arm/src/sys/dev/ipmi/ipmi_pci.c#1 branch
.. //depot/projects/arm/src/sys/dev/ipmi/ipmi_smbios.c#1 branch
.. //depot/projects/arm/src/sys/dev/ipmi/ipmivars.h#1 branch
.. //depot/projects/arm/src/sys/dev/mpt/mpilib/fc_log.h#3 delete
.. //depot/projects/arm/src/sys/dev/mpt/mpt.c#3 integrate
.. //depot/projects/arm/src/sys/dev/mpt/mpt.h#4 integrate
.. //depot/projects/arm/src/sys/dev/mpt/mpt_cam.c#3 integrate
.. //depot/projects/arm/src/sys/dev/mpt/mpt_debug.c#4 integrate
.. //depot/projects/arm/src/sys/dev/mpt/mpt_pci.c#4 integrate
.. //depot/projects/arm/src/sys/dev/usb/ohci.c#6 integrate
.. //depot/projects/arm/src/sys/dev/usb/ohci_pci.c#6 integrate
.. //depot/projects/arm/src/sys/dev/usb/ohcivar.h#5 integrate
.. //depot/projects/arm/src/sys/dev/usb/uplcom.c#4 integrate
.. //depot/projects/arm/src/sys/dev/usb/usb_subr.c#5 integrate
.. //depot/projects/arm/src/sys/dev/usb/usbdevs#11 integrate
.. //depot/projects/arm/src/sys/fs/nullfs/null_vfsops.c#5 integrate
.. //depot/projects/arm/src/sys/geom/eli/g_eli.c#6 integrate
.. //depot/projects/arm/src/sys/geom/mirror/g_mirror.c#7 integrate
.. //depot/projects/arm/src/sys/geom/mirror/g_mirror.h#5 integrate
.. //depot/projects/arm/src/sys/geom/raid3/g_raid3.c#8 integrate
.. //depot/projects/arm/src/sys/geom/raid3/g_raid3.h#5 integrate
.. //depot/projects/arm/src/sys/geom/vinum/geom_vinum_move.c#2 integrate
.. //depot/projects/arm/src/sys/i386/i386/geode.c#3 integrate
.. //depot/projects/arm/src/sys/i386/i386/identcpu.c#9 integrate
.. //depot/projects/arm/src/sys/i386/i386/machdep.c#8 integrate
.. //depot/projects/arm/src/sys/i386/i386/trap.c#6 integrate
.. //depot/projects/arm/src/sys/i386/i386/tsc.c#2 integrate
.. //depot/projects/arm/src/sys/i386/include/xbox.h#2 integrate
.. //depot/projects/arm/src/sys/i386/xbox/xboxfb.c#3 integrate
.. //depot/projects/arm/src/sys/ia64/ia32/ia32_trap.c#3 integrate
.. //depot/projects/arm/src/sys/ia64/ia64/mp_machdep.c#4 integrate
.. //depot/projects/arm/src/sys/ia64/ia64/trap.c#3 integrate
.. //depot/projects/arm/src/sys/kern/kern_clock.c#5 integrate
.. //depot/projects/arm/src/sys/kern/kern_exit.c#11 integrate
.. //depot/projects/arm/src/sys/kern/kern_fork.c#6 integrate
.. //depot/projects/arm/src/sys/kern/kern_proc.c#7 integrate
.. //depot/projects/arm/src/sys/kern/kern_resource.c#5 integrate
.. //depot/projects/arm/src/sys/kern/kern_synch.c#6 integrate
.. //depot/projects/arm/src/sys/kern/kern_tc.c#4 integrate
.. //depot/projects/arm/src/sys/kern/kern_thr.c#5 integrate
.. //depot/projects/arm/src/sys/kern/subr_trap.c#4 integrate
.. //depot/projects/arm/src/sys/modules/geom/geom_eli/Makefile#2 integrate
.. //depot/projects/arm/src/sys/modules/ipmi/Makefile#1 branch
.. //depot/projects/arm/src/sys/net/if_vlan.c#7 integrate
.. //depot/projects/arm/src/sys/net80211/ieee80211_output.c#5 integrate
.. //depot/projects/arm/src/sys/netgraph/netflow/ng_netflow.h#4 integrate
.. //depot/projects/arm/src/sys/netgraph/ng_eiface.c#6 integrate
.. //depot/projects/arm/src/sys/netinet/tcp_syncache.c#7 integrate
.. //depot/projects/arm/src/sys/netinet6/in6.c#4 integrate
.. //depot/projects/arm/src/sys/pc98/conf/NOTES#8 integrate
.. //depot/projects/arm/src/sys/pc98/pc98/machdep.c#4 integrate
.. //depot/projects/arm/src/sys/powerpc/powerpc/trap.c#4 integrate
.. //depot/projects/arm/src/sys/sparc64/sparc64/tick.c#5 integrate
.. //depot/projects/arm/src/sys/sparc64/sparc64/trap.c#3 integrate
.. //depot/projects/arm/src/sys/sys/ipmi.h#1 branch
.. //depot/projects/arm/src/sys/sys/proc.h#8 integrate
.. //depot/projects/arm/src/sys/sys/systm.h#10 integrate
.. //depot/projects/arm/src/sys/ufs/ufs/ufs_quota.c#5 integrate
.. //depot/projects/arm/src/sys/vm/uma_core.c#5 integrate
Differences ...
==== //depot/projects/arm/src/sys/alpha/alpha/trap.c#4 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/alpha/alpha/trap.c,v 1.127 2005/12/06 11:19:36 ru Exp $");
+__FBSDID("$FreeBSD: src/sys/alpha/alpha/trap.c,v 1.128 2006/02/08 08:09:14 phk Exp $");
/* #include "opt_fix_unaligned_vax_fp.h" */
#include "opt_ddb.h"
@@ -259,7 +259,6 @@
register struct proc *p;
register int i;
u_int64_t ucode;
- u_int sticks;
int user;
#ifdef SMP
register_t s;
@@ -302,12 +301,11 @@
CTR5(KTR_TRAP, "%s trap: pid %d, (%lx, %lx, %lx)",
user ? "user" : "kernel", p->p_pid, a0, a1, a2);
if (user) {
- sticks = td->td_sticks;
+ td->td_pticks = 0;
td->td_frame = framep;
if (td->td_ucred != p->p_ucred)
cred_update_thread(td);
} else {
- sticks = 0; /* XXX bogus -Wuninitialized warning */
KASSERT(cold || td->td_ucred != NULL,
("kernel trap doesn't have ucred"));
}
@@ -595,7 +593,7 @@
out:
if (user) {
framep->tf_regs[FRAME_SP] = alpha_pal_rdusp();
- userret(td, framep, sticks);
+ userret(td, framep);
mtx_assert(&Giant, MA_NOTOWNED);
}
return;
@@ -632,7 +630,6 @@
struct proc *p;
int error = 0;
u_int64_t opc;
- u_int sticks;
u_int64_t args[10]; /* XXX */
u_int hidden = 0, nargs;
#ifdef SMP
@@ -664,7 +661,7 @@
PCPU_LAZY_INC(cnt.v_syscall);
td->td_frame = framep;
opc = framep->tf_regs[FRAME_PC] - 4;
- sticks = td->td_sticks;
+ td->td_pticks = 0;
if (td->td_ucred != p->p_ucred)
cred_update_thread(td);
if (p->p_flag & P_SA)
@@ -773,7 +770,7 @@
if ((callp->sy_narg & SYF_MPSAFE) == 0)
mtx_unlock(&Giant);
- userret(td, framep, sticks);
+ userret(td, framep);
#ifdef KTRACE
if (KTRPOINT(td, KTR_SYSRET))
==== //depot/projects/arm/src/sys/amd64/amd64/trap.c#7 (text+ko) ====
@@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/trap.c,v 1.301 2006/02/04 20:37:20 wsalamon Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/trap.c,v 1.302 2006/02/08 08:09:15 phk Exp $");
/*
* AMD64 Trap and System call handling
@@ -162,7 +162,6 @@
{
struct thread *td = curthread;
struct proc *p = td->td_proc;
- u_int sticks = 0;
int i = 0, ucode = 0, type, code;
register_t addr = 0;
ksiginfo_t ksi;
@@ -254,7 +253,7 @@
if (ISPL(frame.tf_cs) == SEL_UPL) {
/* user trap */
- sticks = td->td_sticks;
+ td->td_pticks = 0;
td->td_frame = &frame;
addr = frame.tf_rip;
if (td->td_ucred != p->p_ucred)
@@ -524,7 +523,7 @@
#endif
user:
- userret(td, &frame, sticks);
+ userret(td, &frame);
mtx_assert(&Giant, MA_NOTOWNED);
userout:
out:
@@ -731,7 +730,6 @@
struct thread *td = curthread;
struct proc *p = td->td_proc;
register_t orig_tf_rflags;
- u_int sticks;
int error;
int narg;
register_t args[8];
@@ -757,7 +755,7 @@
reg = 0;
regcnt = 6;
- sticks = td->td_sticks;
+ td->td_pticks = 0;
td->td_frame = &frame;
if (td->td_ucred != p->p_ucred)
cred_update_thread(td);
@@ -885,7 +883,7 @@
/*
* Handle reschedule and other end-of-syscall issues
*/
- userret(td, &frame, sticks);
+ userret(td, &frame);
CTR4(KTR_SYSC, "syscall exit thread %p pid %d proc %s code %d", td,
td->td_proc->p_pid, td->td_proc->p_comm, code);
==== //depot/projects/arm/src/sys/amd64/amd64/tsc.c#2 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/tsc.c,v 1.205 2003/11/17 08:58:13 peter Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/tsc.c,v 1.206 2006/02/11 09:33:05 phk Exp $");
#include "opt_clock.h"
@@ -77,6 +77,7 @@
tsc_freq = tscval[1] - tscval[0];
if (bootverbose)
printf("TSC clock: %lu Hz\n", tsc_freq);
+ set_cputicker(rdtsc, tsc_freq, 1);
}
==== //depot/projects/arm/src/sys/amd64/ia32/ia32_syscall.c#4 (text+ko) ====
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/ia32/ia32_syscall.c,v 1.10 2006/02/04 20:37:20 wsalamon Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/ia32/ia32_syscall.c,v 1.11 2006/02/08 08:09:15 phk Exp $");
/*
* 386 Trap and System call handling
@@ -96,7 +96,6 @@
struct thread *td = curthread;
struct proc *p = td->td_proc;
register_t orig_tf_rflags;
- u_int sticks;
int error;
int narg;
u_int32_t args[8];
@@ -110,7 +109,7 @@
*/
PCPU_LAZY_INC(cnt.v_syscall);
- sticks = td->td_sticks;
+ td->td_pticks = 0;
td->td_frame = &frame;
if (td->td_ucred != p->p_ucred)
cred_update_thread(td);
@@ -241,7 +240,7 @@
/*
* Handle reschedule and other end-of-syscall issues
*/
- userret(td, &frame, sticks);
+ userret(td, &frame);
#ifdef KTRACE
if (KTRPOINT(td, KTR_SYSRET))
==== //depot/projects/arm/src/sys/arm/arm/trap.c#7 (text+ko) ====
@@ -82,7 +82,7 @@
#include "opt_ktrace.h"
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/trap.c,v 1.20 2006/02/04 17:01:19 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/trap.c,v 1.21 2006/02/08 08:09:15 phk Exp $");
#include <sys/types.h>
@@ -234,7 +234,6 @@
vm_prot_t ftype;
void *onfault;
vm_offset_t va;
- u_int sticks = 0;
int error = 0;
struct ksig ksig;
struct proc *p;
@@ -261,7 +260,8 @@
user = TRAP_USERMODE(tf);
if (user) {
- sticks = td->td_sticks; td->td_frame = tf;
+ td->td_pticks = 0;
+ td->td_frame = tf;
if (td->td_ucred != td->td_proc->p_ucred)
cred_update_thread(td);
if (td->td_pflags & TDP_SA)
@@ -465,7 +465,7 @@
out:
/* If returning to user mode, make sure to invoke userret() */
if (user)
- userret(td, tf, sticks);
+ userret(td, tf);
}
/*
@@ -707,7 +707,6 @@
struct vm_map *map;
vm_offset_t fault_pc, va;
int error = 0;
- u_int sticks = 0;
struct ksig ksig;
@@ -754,7 +753,7 @@
/* Prefetch aborts cannot happen in kernel mode */
if (__predict_false(!TRAP_USERMODE(tf)))
dab_fatal(tf, 0, tf->tf_pc, NULL, &ksig);
- sticks = td->td_sticks;
+ td->td_pticks = 0;
/* Ok validate the address, can only execute in USER space */
@@ -809,7 +808,7 @@
call_trapsignal(td, ksig.signb, ksig.code);
out:
- userret(td, tf, sticks);
+ userret(td, tf);
}
@@ -871,10 +870,9 @@
register_t *ap, *args, copyargs[MAXARGS];
struct sysent *callp;
int locked = 0;
- u_int sticks = 0;
PCPU_LAZY_INC(cnt.v_syscall);
- sticks = td->td_sticks;
+ td->td_pticks = 0;
if (td->td_ucred != td->td_proc->p_ucred)
cred_update_thread(td);
switch (insn & SWI_OS_MASK) {
@@ -883,11 +881,11 @@
break;
default:
call_trapsignal(td, SIGILL, 0);
- userret(td, frame, td->td_sticks);
+ userret(td, frame);
return;
}
code = insn & 0x000fffff;
- sticks = td->td_sticks;
+ td->td_pticks = 0;
ap = &frame->tf_r0;
if (code == SYS_syscall) {
code = *ap++;
@@ -973,7 +971,7 @@
mtx_unlock(&Giant);
- userret(td, frame, sticks);
+ userret(td, frame);
CTR4(KTR_SYSC, "syscall exit thread %p pid %d proc %s code %d", td,
td->td_proc->p_pid, td->td_proc->p_comm, code);
@@ -995,6 +993,7 @@
td->td_frame = frame;
+ td->td_pticks = 0;
if (td->td_proc->p_flag & P_SA)
thread_user_enter(td);
/*
@@ -1003,7 +1002,7 @@
*/
if (__predict_false(((frame->tf_pc - INSN_SIZE) & 3) != 0)) {
call_trapsignal(td, SIGILL, 0);
- userret(td, frame, td->td_sticks);
+ userret(td, frame);
return;
}
insn = *(u_int32_t *)(frame->tf_pc - INSN_SIZE);
==== //depot/projects/arm/src/sys/arm/at91/at91.c#5 (text+ko) ====
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
+__FBSDID("$FreeBSD: src/sys/arm/at91/at91.c,v 1.2 2006/02/11 03:58:07 imp Exp $");
#include <sys/param.h>
#include <sys/systm.h>
==== //depot/projects/arm/src/sys/arm/at91/at91_spi.c#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_spiio.h#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_spireg.h#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_st.c#3 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_streg.h#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_twi.c#5 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_twiio.h#3 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_twireg.h#5 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91_usartreg.h#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#13 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/at91var.h#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/files.at91rm92#10 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/files.kb920x#3 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/if_ate.c#28 (text+ko) ====
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
+__FBSDID("$FreeBSD: src/sys/arm/at91/if_ate.c,v 1.4 2006/02/07 21:31:13 cognet Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -147,6 +147,7 @@
static int ate_ifmedia_upd(struct ifnet *ifp);
static void ate_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
static void ate_get_mac(struct ate_softc *sc, u_char *eaddr);
+static void ate_set_mac(struct ate_softc *sc, u_char *eaddr);
/*
* The AT91 family of products has the ethernet called EMAC. However,
@@ -180,14 +181,15 @@
callout_init_mtx(&sc->tick_ch, &sc->sc_mtx, 0);
ate_get_mac(sc, eaddr);
+ ate_set_mac(sc, eaddr);
+ sc->ifp = ifp = if_alloc(IFT_ETHER);
if (mii_phy_probe(dev, &sc->miibus, ate_ifmedia_upd, ate_ifmedia_sts)) {
device_printf(dev, "Cannot find my PHY.\n");
err = ENXIO;
goto out;
}
- sc->ifp = ifp = if_alloc(IFT_ETHER);
ifp->if_softc = sc;
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
ifp->if_mtu = ETHERMTU;
@@ -540,6 +542,15 @@
}
static void
+ate_set_mac(struct ate_softc *sc, u_char *eaddr)
+{
+ WR4(sc, ETH_SA1L, (eaddr[3] << 24) | (eaddr[2] << 16) |
+ (eaddr[1] << 8) | eaddr[0]);
+ WR4(sc, ETH_SA1H, (eaddr[5] << 8) | (eaddr[4]));
+
+}
+
+static void
ate_get_mac(struct ate_softc *sc, u_char *eaddr)
{
uint32_t low, high;
@@ -569,7 +580,8 @@
status = RD4(sc, ETH_ISR);
if (status == 0)
return;
- printf("IT IS %x\n", RD4(sc, ETH_RSR));
+ printf("IT IS %x %x\n", RD4(sc, ETH_RSR), RD4(sc, ETH_CTL));
+
if (status & ETH_ISR_RCOM) {
bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map,
BUS_DMASYNC_POSTREAD);
@@ -611,6 +623,10 @@
BUS_DMASYNC_PREWRITE);
continue;
}
+ mb->m_len = sc->rx_descs[i].status &
+ ETH_LEN_MASK;
+ mb->m_pkthdr.len = mb->m_len;
+ mb->m_pkthdr.rcvif = sc->ifp;
/*
* For the last buffer, set the wrap bit so
* the controller restarts from the first
@@ -817,7 +833,7 @@
/*
* Enable some parts of the MAC that are needed always (like the
* MII bus. This turns off the RE and TE bits, which will remain
- * off until atestart() is called to turn them on. With RE and TE
+ * off until ateinit() is called to turn them on. With RE and TE
* turned off, there's no DMA to worry about after this write.
*/
WR4(sc, ETH_CTL, ETH_CTL_MPE);
==== //depot/projects/arm/src/sys/arm/at91/if_atereg.h#6 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c#15 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/std.at91rm92#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/std.kb920x#2 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/uart_bus_at91usart.c#5 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/uart_cpu_at91rm9200usart.c#7 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#10 (text+ko) ====
==== //depot/projects/arm/src/sys/arm/conf/KB920X#17 (text+ko) ====
@@ -1,4 +1,5 @@
-# GENERIC -- Generic kernel configuration file for FreeBSD/arm
+# KB920X -- Custom kernel configuration for the KB9200, 9201 and 9202
+# AT91RM9200 evaluation boards from kwikbyte.com.
#
# For more information on this file, please read the handbook section on
# Kernel Configuration Files:
@@ -15,7 +16,7 @@
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
-# $FreeBSD: src/sys/arm/conf/SIMICS,v 1.8 2005/10/04 14:39:33 cognet Exp $
+# $FreeBSD: src/sys/arm/conf/KB920X,v 1.3 2006/02/07 18:45:10 imp Exp $
machine arm
ident KB920X
@@ -42,7 +43,7 @@
#options UFS_ACL #Support for access control lists
#options UFS_DIRHASH #Improve performance on big directories
options MD_ROOT #MD is a potential root device
-options MD_ROOT_SIZE=4096 # 5MB ram disk
+options MD_ROOT_SIZE=4096 # 3MB ram disk
options ROOTDEVNAME=\"ufs:md0\"
#options NFSCLIENT #Network Filesystem Client
#options NFSSERVER #Network Filesystem Server
@@ -72,13 +73,6 @@
device mii
device lxtphy
-# USB support
-device ohci # OHCI USB interface
-device usb # USB Bus (required)
-device umass # Disks/Mass storage - Requires scbus and da
-device scbus # SCSI bus (required for SCSI)
-device da # Direct Access (disks)
-
# Debugging for use in -current
#options INVARIANTS #Enable calls of extra sanity checking
#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS
==== //depot/projects/arm/src/sys/arm/conf/SKYEYE#3 (text+ko) ====
@@ -1,4 +1,5 @@
-# GENERIC -- Generic kernel configuration file for FreeBSD/arm
+# SKYEYE -- Kernel configuration for running the skyeye simulator
+# simulating the Atmel AT91RM9200.
#
# For more information on this file, please read the handbook section on
# Kernel Configuration Files:
@@ -15,7 +16,7 @@
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
-# $FreeBSD: src/sys/arm/conf/SIMICS,v 1.8 2005/10/04 14:39:33 cognet Exp $
+# $FreeBSD: src/sys/arm/conf/SKYEYE,v 1.2 2006/02/07 18:45:54 imp Exp $
machine arm
ident KB920X
==== //depot/projects/arm/src/sys/contrib/dev/ath/COPYRIGHT#2 (text+ko) ====
@@ -4,7 +4,7 @@
redistribution with changes.
/*-
- * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting, Atheros
+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting, Atheros
* Communications, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms are permitted
@@ -38,5 +38,5 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGES.
*
- * $Id: COPYRIGHT,v 1.3 2004/01/07 23:09:27 sam Exp $
+ * $Id: //depot/sw/linuxsrc/src/802_11/madwifi/hal/main/COPYRIGHT#5 $
*/
==== //depot/projects/arm/src/sys/contrib/dev/ath/README#2 (text+ko) ====
@@ -1,35 +1,32 @@
-$Id: README,v 1.3 2004/01/07 23:09:27 sam Exp $
-
-
-WARNING: THIS IS A BETA DISTRIBUTION. THIS SOFTWARE HAS KNOWN PROBLEMS AND
-WARNING: LIMITATIONS THAT WILL BE CORRECTED BEFORE A PRODUCTION RELEASE.
-WARNING: USE AT YOUR OWN RISK!
+$Id: //depot/sw/linuxsrc/src/802_11/madwifi/hal/main/README#5 $
Atheros Hardware Access Layer (HAL)
===================================
-* Copyright (c) 2002-2004 Sam Leffler.
-* Copyright (c) 2002-2004 Atheros Communications, Inc.
+* Copyright (c) 2002-2006 Sam Leffler.
+* Copyright (c) 2002-2006 Atheros Communications, Inc.
* All rights reserved.
Read the file COPYRIGHT for the complete copyright.
-This code manages much of the chip-specific operation of the Atheros driver.
-The HAL is provided in a binary-only form in order to comply with FCC
-regulations. In particular, a radio transmitter can only be operated at
-power levels and on frequency channels for which it is approved. The FCC
-requires that a software-defined radio cannot be configured by a user
-to operate outside the approved power levels and frequency channels.
-This makes it difficult to open-source code that enforces limits on
-the power levels, frequency channels and other parameters of the radio
-transmitter. See
+This code manages much of the chip-specific operation of the Atheros
+driver. The HAL is provided in a binary-only form in order to
+comply with local regulatory agency rules. In the United States
+the FCC requires that a radio transmitter only be operated at power
+levels and on frequency channels for which it is approved. The FCC
+requires that a software-defined radio cannot be configured by a
+user to operate outside the approved power levels and frequency
+channels. This makes it difficult to open-source code that enforces
+limits on the power levels, frequency channels and other parameters
+of the radio transmitter. See
http://ftp.fcc.gov/Bureaus/Engineering_Technology/Orders/2001/fcc01264.pdf
-for the specific FCC regulation. Because the module is provided in a
-binary-only form it is marked "Proprietary"; this means when you load
-it you will see messages that your system is now "tainted".
+for the specific FCC regulation. Because the module is provided
+in a binary-only form it is marked "Proprietary" on Linux; this
+means when you load it you will see messages that your system is
+now "tainted".
If you wish to use this driver on a platform for which an ath_hal
module is not already provided please contact the author. Note that
@@ -39,26 +36,19 @@
Atheros Hardware
================
-There are currently 3 generations of Atheros 802.11 wireless devices:
+There are many generations of Atheros 802.11 wireless devices that
+are typically referred to by their programming model:
5210 supports 11a only
5211 supports both 11a and 11b
5212 supports 11a, 11b, and 11g
These parts have been incorporated in a variety of retail products
-including cardbus cards from DLink, Linksys, Netgear, and Proxim; and
-mini-pci cards from some of these same vendors. In addition many
-laptop vendors use Atheros mini-pci cards for their builtin wireless
-support. An (incomplete) list of products that use Atheros parts is:
+including cardbus cards and mini-pci cards. In addition many laptop
+vendors use Atheros mini-pci cards for their builtin wireless
+support.
-Netgear WAG511 D-Link DWL-AG520 Linksys WPC55AG
-Netgear WAB501 D-Link DWL-AG650 Linksys WMP55AG
- D-Link DWL-AB650 Linksys WPC51AB
-
-In general, if a device is identified as ``11a only'' it is almost
-certain to contain an Atheros 5210 part in it. All retail a+b
-products use the 5211. The latest generation of universal a+b+g
-combo products use the 5212. When in doubt check the PCI vendor
-id with a tool like lspci, the Atheros vendor id is 0x168c; e.g.
-
- 00:13.0 Ethernet controller: Unknown device 168c:0012 (rev 01)
+The Atheors PCI vendor id is 0x168c. The file ah_devid.h lists most
+known PCI device id's but is not exhaustive. Some vendors program
+their own vendor and/or device id's to aid in BIOS-locking mini-pci
+cards in laptops.
==== //depot/projects/arm/src/sys/contrib/dev/ath/ah.h#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting, Atheros
+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting, Atheros
* Communications, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms are permitted
@@ -33,7 +33,7 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGES.
*
- * $Id: ah.h,v 1.82 2004/11/30 00:31:42 sam Exp $
+ * $Id: //depot/sw/linuxsrc/src/802_11/madwifi/hal/main/ah.h#134 $
*/
#ifndef _ATH_AH_H_
@@ -105,13 +105,25 @@
HAL_CAP_FASTFRAME = 14, /* hardware supoprts fast frames */
HAL_CAP_TXPOW = 15, /* global tx power limit */
HAL_CAP_TPC = 16, /* per-packet tx power control */
+ HAL_CAP_PHYDIAG = 17, /* hardware phy error diagnostic */
+ HAL_CAP_BSSIDMASK = 18, /* hardware supports bssid mask */
+ HAL_CAP_MCAST_KEYSRCH = 19, /* hardware has multicast key search */
+ HAL_CAP_TSF_ADJUST = 20, /* hardware has beacon tsf adjust */
+ HAL_CAP_XR = 21, /* hardware has XR support */
+ HAL_CAP_WME_TKIPMIC = 22, /* hardware can support TKIP MIC when WMM is turned on */
+ HAL_CAP_CHAN_HALFRATE = 23, /* hardware can support half rate channels */
+ HAL_CAP_CHAN_QUARTERRATE = 24, /* hardware can support quarter rate channels */
+ HAL_CAP_RFSILENT = 25, /* hardware has rfsilent support */
+ HAL_CAP_TPC_ACK = 26, /* ack txpower with per-packet tpc */
+ HAL_CAP_TPC_CTS = 27, /* cts txpower with per-packet tpc */
+ HAL_CAP_11D = 28, /* 11d beacon support for changing cc */
} HAL_CAPABILITY_TYPE;
/*
* "States" for setting the LED. These correspond to
* the possible 802.11 operational states and there may
* be a many-to-one mapping between these states and the
- * actual hardware states for the LED's (i.e. the hardware
+ * actual hardware state for the LED's (i.e. the hardware
* may have fewer states).
*/
typedef enum {
@@ -132,7 +144,7 @@
HAL_TX_QUEUE_DATA = 1, /* data xmit q's */
HAL_TX_QUEUE_BEACON = 2, /* beacon xmit q */
HAL_TX_QUEUE_CAB = 3, /* "crap after beacon" xmit q */
- HAL_TX_QUEUE_PSPOLL = 4, /* power-save poll xmit q */
+ HAL_TX_QUEUE_UAPSD = 4, /* u-apsd power save xmit q */
} HAL_TX_QUEUE;
#define HAL_NUM_TX_QUEUES 10 /* max possible # of queues */
@@ -148,6 +160,7 @@
HAL_WME_AC_VI = 2, /* video access category */
HAL_WME_AC_VO = 3, /* voice access category */
HAL_WME_UPSD = 4, /* uplink power save */
+ HAL_XR_DATA = 5, /* uplink power save */
} HAL_TX_QUEUE_SUBTYPE;
/*
@@ -155,17 +168,83 @@
* operational parameters.
*/
typedef enum {
- TXQ_FLAG_TXOKINT_ENABLE = 0x0001, /* enable TXOK interrupt */
- TXQ_FLAG_TXERRINT_ENABLE = 0x0001, /* enable TXERR interrupt */
- TXQ_FLAG_TXDESCINT_ENABLE = 0x0002, /* enable TXDESC interrupt */
- TXQ_FLAG_TXEOLINT_ENABLE = 0x0004, /* enable TXEOL interrupt */
- TXQ_FLAG_TXURNINT_ENABLE = 0x0008, /* enable TXURN interrupt */
- TXQ_FLAG_BACKOFF_DISABLE = 0x0010, /* disable Post Backoff */
- TXQ_FLAG_COMPRESSION_ENABLE = 0x0020, /* compression enabled */
- TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE = 0x0040, /* enable ready time
- expiry policy */
- TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080, /* enable backoff while
- sending fragment burst*/
+ /*
+ * Per queue interrupt enables. When set the associated
+ * interrupt may be delivered for packets sent through
+ * the queue. Without these enabled no interrupts will
+ * be delivered for transmits through the queue.
+ */
+ HAL_TXQ_TXOKINT_ENABLE = 0x0001, /* enable TXOK interrupt */
+ HAL_TXQ_TXERRINT_ENABLE = 0x0001, /* enable TXERR interrupt */
+ HAL_TXQ_TXDESCINT_ENABLE = 0x0002, /* enable TXDESC interrupt */
+ HAL_TXQ_TXEOLINT_ENABLE = 0x0004, /* enable TXEOL interrupt */
+ HAL_TXQ_TXURNINT_ENABLE = 0x0008, /* enable TXURN interrupt */
+ /*
+ * Enable hardware compression for packets sent through
+ * the queue. The compression buffer must be setup and
+ * packets must have a key entry marked in the tx descriptor.
+ */
+ HAL_TXQ_COMPRESSION_ENABLE = 0x0010, /* enable h/w compression */
+ /*
+ * Disable queue when veol is hit or ready time expires.
+ * By default the queue is disabled only on reaching the
+ * physical end of queue (i.e. a null link ptr in the
+ * descriptor chain).
+ */
+ HAL_TXQ_RDYTIME_EXP_POLICY_ENABLE = 0x0020,
+ /*
+ * Schedule frames on delivery of a DBA (DMA Beacon Alert)
+ * event. Frames will be transmitted only when this timer
+ * fires, e.g to transmit a beacon in ap or adhoc modes.
+ */
+ HAL_TXQ_DBA_GATED = 0x0040, /* schedule based on DBA */
+ /*
+ * Each transmit queue has a counter that is incremented
+ * each time the queue is enabled and decremented when
+ * the list of frames to transmit is traversed (or when
+ * the ready time for the queue expires). This counter
+ * must be non-zero for frames to be scheduled for
+ * transmission. The following controls disable bumping
+ * this counter under certain conditions. Typically this
+ * is used to gate frames based on the contents of another
+ * queue (e.g. CAB traffic may only follow a beacon frame).
+ * These are meaningful only when frames are scheduled
+ * with a non-ASAP policy (e.g. DBA-gated).
+ */
+ HAL_TXQ_CBR_DIS_QEMPTY = 0x0080, /* disable on this q empty */
+ HAL_TXQ_CBR_DIS_BEMPTY = 0x0100, /* disable on beacon q empty */
+
+ /*
+ * Fragment burst backoff policy. Normally the no backoff
+ * is done after a successful transmission, the next fragment
+ * is sent at SIFS. If this flag is set backoff is done
+ * after each fragment, regardless whether it was ack'd or
+ * not, after the backoff count reaches zero a normal channel
+ * access procedure is done before the next transmit (i.e.
+ * wait AIFS instead of SIFS).
+ */
+ HAL_TXQ_FRAG_BURST_BACKOFF_ENABLE = 0x00800000,
+ /*
+ * Disable post-tx backoff following each frame.
+ */
+ HAL_TXQ_BACKOFF_DISABLE = 0x00010000, /* disable post backoff */
+ /*
+ * DCU arbiter lockout control. This controls how
+ * lower priority tx queues are handled with respect to
+ * to a specific queue when multiple queues have frames
+ * to send. No lockout means lower priority queues arbitrate
+ * concurrently with this queue. Intra-frame lockout
+ * means lower priority queues are locked out until the
+ * current frame transmits (e.g. including backoffs and bursting).
+ * Global lockout means nothing lower can arbitrary so
+ * long as there is traffic activity on this queue (frames,
+ * backoff, etc).
+ */
+ HAL_TXQ_ARB_LOCKOUT_INTRA = 0x00020000, /* intra-frame lockout */
+ HAL_TXQ_ARB_LOCKOUT_GLOBAL = 0x00040000, /* full lockout s */
+
+ HAL_TXQ_IGNORE_VIRTCOL = 0x00080000, /* ignore virt collisions */
+ HAL_TXQ_SEQNUM_INC_DIS = 0x00100000, /* disable seqnum increment */
} HAL_TX_QUEUE_FLAGS;
typedef struct {
@@ -178,15 +257,24 @@
u_int32_t tqi_cwmax; /* cwMax */
u_int16_t tqi_shretry; /* rts retry limit */
u_int16_t tqi_lgretry; /* long retry limit (not used)*/
- u_int32_t tqi_cbrPeriod;
- u_int32_t tqi_cbrOverflowLimit;
- u_int32_t tqi_burstTime;
- u_int32_t tqi_readyTime;
+ u_int32_t tqi_cbrPeriod; /* CBR period (us) */
+ u_int32_t tqi_cbrOverflowLimit; /* threshold for CBROVF int */
+ u_int32_t tqi_burstTime; /* max burst duration (us) */
+ u_int32_t tqi_readyTime; /* frame schedule time (us) */
+ u_int32_t tqi_compBuf; /* comp buffer phys addr */
} HAL_TXQ_INFO;
+#define HAL_TQI_NONVAL 0xffff
+
/* token to use for aifs, cwmin, cwmax */
#define HAL_TXQ_USEDEFAULT ((u_int32_t) -1)
+/* compression definitions */
+#define HAL_COMP_BUF_MAX_SIZE 9216 /* 9K */
+#define HAL_COMP_BUF_ALIGN_SIZE 512
+#define HAL_DECOMP_MASK_SIZE 128
+
+
/*
* Transmit packet types. This belongs in ah_desc.h, but
* is here so we can give a proper type to various parameters
@@ -201,6 +289,8 @@
HAL_PKT_TYPE_PSPOLL = 2,
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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