PERFORCE change 94961 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=94961

Change 94961 by imp at imp_Speedy on 2006/04/11 00:22:42

	minor moves towards supporting dual clocks.

Affected files ...

.. //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.c#7 edit

Differences ...

==== //depot/projects/arm/src/sys/boot/arm/kb920x/boot0/at91rm9200_lowlevel.c#7 (text+ko) ====

@@ -50,6 +50,7 @@
 	register unsigned	value;
 	int i;
 	volatile unsigned short *p = (unsigned short *)SDRAM_BASE;
+	unsigned int div;
 
 	AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC10;
 	AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC10;
@@ -61,14 +62,19 @@
 	//    PLLB configured for 96MHz (48MHz after div)
 	//    CSS = PLLB
 	
+	// Crude selection between 16MHz clock and 10MHz clock.
+	if (AT91C_BASE_CKGR->CKGR_MCFR & AT91C_CKGR_MAINF < 6000)
+		div = OSC_MAIN_FREQ_DIV_10;
+	else
+		div = OSC_MAIN_FREQ_DIV_16;
+	
 	// set PLLA = 180MHz
 	// assume main osc = 10Mhz
 	// div = 5 , out = 2 (150MHz = 240MHz)
 	value = AT91C_BASE_CKGR->CKGR_PLLAR;
 	value &= ~AT91C_CKGR_DIVA;
 	value &= ~AT91C_CKGR_OUTA;
-	value |= (OSC_MAIN_FREQ_DIV_16 | AT91C_CKGR_OUTA_2);
-	value |= AT91C_CKGR_SRCA;
+	value |= div | AT91C_CKGR_OUTA_2 | AT91C_CKGR_SRCA;
 	AT91C_BASE_CKGR->CKGR_PLLAR = value;
 
 	// mul = 90