PERFORCE change 76769 for review

[Marcel Moolenaar]

http://perforce.freebsd.org/chv.cgi?CH=76769

Change 76769 by marcel at marcel_nfs on 2005/05/10 05:31:23

	o  Define the VGA framebuffer resource size as 64K, not as 128K. We
	   program the VGA to use a 64K page size.
	o  Disable access to the palettes by default, as it's the normal
	   operating mode.
	o  Remove some EGA specific definitions.

Affected files ...

.. //depot/projects/tty/sys/dev/ic/vga.h#4 edit

Differences ...

==== //depot/projects/tty/sys/dev/ic/vga.h#4 (text+ko) ====

@@ -48,21 +48,21 @@
  */
 
 #define	VGA_MEM_BASE	0xA0000
-#define	VGA_MEM_SIZE	0x20000
+#define	VGA_MEM_SIZE	0x10000
 #define	VGA_REG_BASE	0x3c0
 #define	VGA_REG_SIZE	0x10+0x0c
 
 /* Attribute controller registers. */
 #define	VGA_AC_WRITE		0x00
 #define	VGA_AC_READ		0x01
-#define	VGA_AC_PALETTE(x)		x	/* 0 <= x <= 15 */
+#define	VGA_AC_PALETTE(x)		(x)	/* 0 <= x <= 15 */
 #define		VGA_AC_PAL_SR		0x20	/* Secondary red */
 #define		VGA_AC_PAL_SG		0x10	/* Secondary green */
 #define		VGA_AC_PAL_SB		0x08	/* Secondary blue */
 #define		VGA_AC_PAL_R		0x04	/* Red */
 #define		VGA_AC_PAL_G		0x02	/* Green */
 #define		VGA_AC_PAL_B		0x01	/* Blue */
-#define	VGA_AC_MODE_CONTROL		16
+#define	VGA_AC_MODE_CONTROL		(32+16)
 #define		VGA_AC_MC_IPS		0x80	/* Internal palette size */
 #define		VGA_AC_MC_PCS		0x40	/* Pixel clock select */
 #define		VGA_AC_MC_PPC		0x20	/* Pixel panning compat. */
@@ -70,10 +70,10 @@
 #define		VGA_AC_MC_ELG		0x04	/* Enable line graphics cc. */
 #define		VGA_AC_MC_DT		0x02	/* Display type */
 #define		VGA_AC_MC_GA		0x01	/* Graphics/alphanumeric */
-#define	VGA_AC_OVERSCAN_COLOR		17
-#define	VGA_AC_COLOR_PLANE_ENABLE	18
-#define	VGA_AC_HORIZ_PIXEL_PANNING	19
-#define	VGA_AC_COLOR_SELECT		20
+#define	VGA_AC_OVERSCAN_COLOR		(32+17)
+#define	VGA_AC_COLOR_PLANE_ENABLE	(32+18)
+#define	VGA_AC_HORIZ_PIXEL_PANNING	(32+19)
+#define	VGA_AC_COLOR_SELECT		(32+20)
 #define		VGA_AC_CS_C67		0x0C	/* Color reg. addr. bits 6+7 */
 #define		VGA_AC_CS_C45		0x03	/* Color reg. addr. bits 4+5 */
 
@@ -87,10 +87,8 @@
 #define		VGA_GEN_MO_ER		0x02	/* Enable RAM */
 #define		VGA_GEN_MO_IOA		0x01	/* Input/output address */
 #define	VGA_GEN_INPUT_STAT_0	0x02		/* Read only. */
-#define		VGA_GEN_IS0_SS		0x10	/* Switch sense */
 #define	VGA_GEN_FEATURE_CTRL_W	0x1a		/* Write only. */
 #define	VGA_GEN_FEATURE_CTRL_R	0x0a		/* Read only. */
-#define		VGA_GEN_FC_VSS		0x80	/* vertical sync. select */
 #define	VGA_GEN_INPUT_STAT_1	0x1a		/* Read only. */
 #define		VGA_GEN_IS1_VR		0x08	/* Vertical retrace */
 #define		VGA_GEN_IS1_DE		0x01	/* Display enable not */
@@ -120,7 +118,6 @@
 #define		VGA_SEQ_MM_C4		0x08	/* Chain four */
 #define		VGA_SEQ_MM_OE		0x04	/* Odd/even */
 #define		VGA_SEQ_MM_EM		0x02	/* Extended memory */
-#define		VGA_SEQ_MM_AG		0x01	/* Alpha/graphics mode */
 #define	VGA_SEQ_DATA		0x05
 
 /* Color registers. */