PERFORCE change 76678 for review
Marcel Moolenaar
marcel at FreeBSD.org
Sun May 8 01:12:50 PDT 2005
http://perforce.freebsd.org/chv.cgi?CH=76678
Change 76678 by marcel at marcel_nfs on 2005/05/08 08:12:38
Simplify resource allocation by eliminating the need for a separate
CRTC register resource. Remove the screen sub-region as well.
Affected files ...
.. //depot/projects/tty/sys/dev/vga/vga.c#7 edit
.. //depot/projects/tty/sys/dev/vga/vga.h#5 edit
.. //depot/projects/tty/sys/dev/vga/vga_bus_pci.c#3 edit
.. //depot/projects/tty/sys/dev/vga/vga_con.c#2 edit
.. //depot/projects/tty/sys/dev/vga/vga_cpu_alpha.c#4 edit
.. //depot/projects/tty/sys/dev/vga/vga_cpu_amd64.c#4 edit
.. //depot/projects/tty/sys/dev/vga/vga_cpu_i386.c#5 edit
.. //depot/projects/tty/sys/dev/vga/vga_cpu_ia64.c#4 edit
.. //depot/projects/tty/sys/dev/vga/vga_cpu_sparc64.c#3 edit
Differences ...
==== //depot/projects/tty/sys/dev/vga/vga.c#7 (text+ko) ====
@@ -38,10 +38,6 @@
#include <dev/vga/vga.h>
/* Convenience macros. */
-#define CRTC_READ(sc, reg) \
- bus_space_read_1(sc->vga_crtc.bst, sc->vga_crtc.bsh, reg)
-#define CRTC_WRITE(sc, reg, val) \
- bus_space_write_1(sc->vga_crtc.bst, sc->vga_crtc.bsh, reg, val)
#define REG_READ(sc, reg) \
bus_space_read_1(sc->vga_reg.bst, sc->vga_reg.bsh, reg)
#define REG_WRITE(sc, reg, val) \
@@ -61,85 +57,82 @@
int
vga_init(struct vga_softc *sc)
{
- int error;
uint8_t x;
- sc->vga_screen = sc->vga_fb;
- error = bus_space_subregion(sc->vga_fb.bst, sc->vga_fb.bsh,
- (sc->vga_mono) ? 0x10000 : 0x18000, 4096, &sc->vga_screen.bsh);
- if (error)
- return (error);
+ /* Make sure the VGA adapter is not in monochrome emulation mode. */
+ x = REG_READ(sc, VGA_GEN_MISC_OUTPUT_R);
+ REG_WRITE(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA);
- /* Disable the sync. signals. */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
- x = CRTC_READ(sc, VGA_CRTC_DATA);
- CRTC_WRITE(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR);
+ /* Now, disable the sync. signals. */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
+ x = REG_READ(sc, VGA_CRTC_DATA);
+ REG_WRITE(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR);
/* Unprotect CRTC registers 0-7. */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
- x = CRTC_READ(sc, VGA_CRTC_DATA);
- CRTC_WRITE(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
+ x = REG_READ(sc, VGA_CRTC_DATA);
+ REG_WRITE(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR);
/*
* Set the VGA adapter in mode 0x12 (640x480x16).
*/
/* Reprogram the CRTC. */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x5f); /* 760 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x50); /* 640 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK);
- CRTC_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x54); /* 672 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE);
- CRTC_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x0b); /* 523 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW);
- CRTC_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 |
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x5f); /* 760 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x50); /* 640 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK);
+ REG_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x54); /* 672 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE);
+ REG_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x0b); /* 523 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW);
+ REG_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 |
VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE);
- CRTC_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x59);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x8c);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x28);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0x04);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
- CRTC_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW |
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE);
+ REG_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x59);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x8c);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x28);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0x04);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
+ REG_WRITE(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW |
VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS);
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE);
- CRTC_WRITE(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE);
+ REG_WRITE(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */
/* Reprogram the general registers. */
REG_WRITE(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP |
VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA);
- REG_WRITE(sc, VGA_EXT_FEATURE_CTRL, 0);
+ REG_WRITE(sc, VGA_GEN_FEATURE_CTRL_W, 0);
/* Reprogram the sequencer. */
REG_WRITE(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
REG_WRITE(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR);
@@ -156,9 +149,9 @@
/* Reprogram the graphics controller. */
/* Enable the sync signals. */
- CRTC_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
- x = CRTC_READ(sc, VGA_CRTC_DATA);
- CRTC_WRITE(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR);
+ REG_WRITE(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
+ x = REG_READ(sc, VGA_CRTC_DATA);
+ REG_WRITE(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR);
sc->vga_enable = 1;
return (0);
==== //depot/projects/tty/sys/dev/vga/vga.h#5 (text+ko) ====
@@ -46,25 +46,19 @@
#define VGA_BUSTYPE_PCI 2
int vga_console:1;
int vga_enable:1;
- int vga_mono:1;
/* Bus spaces */
- struct vga_spc vga_spc[4];
+ struct vga_spc vga_spc[2];
#define VGA_RES_FB 0
-#define VGA_RES_SCREEN 1
-#define VGA_RES_REG 2
-#define VGA_RES_CRTC 3
+#define VGA_RES_REG 1
};
#define vga_fb vga_spc[VGA_RES_FB]
-#define vga_screen vga_spc[VGA_RES_SCREEN]
#define vga_reg vga_spc[VGA_RES_REG]
-#define vga_crtc vga_spc[VGA_RES_CRTC]
struct vga_consdata {
struct vga_spc fb;
struct vga_spc reg;
- struct vga_spc crtc;
};
int vga_get_console(struct vga_consdata*);
@@ -73,15 +67,6 @@
extern devclass_t vga_devclass;
extern char vga_device_name[];
-static __inline int
-vga_is_mono(struct vga_spc *sp)
-{
- uint8_t misc;
-
- misc = bus_space_read_1(sp->bst, sp->bsh, VGA_GEN_MISC_OUTPUT_R);
- return ((misc & VGA_GEN_MO_IOA) ? 0 : 1);
-}
-
int vga_attach(device_t);
int vga_bitblt(struct vga_softc *, int, int);
int vga_init(struct vga_softc *);
==== //depot/projects/tty/sys/dev/vga/vga_bus_pci.c#3 (text+ko) ====
@@ -91,25 +91,15 @@
/* Set the legacy resources */
bus_set_resource(dev, SYS_RES_MEMORY, VGA_RES_FB, VGA_MEM_BASE,
VGA_MEM_SIZE);
- bus_set_resource(dev, SYS_RES_IOPORT, VGA_RES_REG, VGA_IO0_BASE,
- VGA_IO0_SIZE);
-
error = vga_pci_alloc(dev, sc, SYS_RES_MEMORY, VGA_RES_FB);
if (error)
return (error);
+ bus_set_resource(dev, SYS_RES_IOPORT, VGA_RES_REG, VGA_REG_BASE,
+ VGA_REG_SIZE);
error = vga_pci_alloc(dev, sc, SYS_RES_IOPORT, VGA_RES_REG);
if (error)
return (error);
- /* Determine if the VGA controller is in color or monochrome mode. */
- sc->vga_mono = vga_is_mono(&sc->vga_reg);
-
- bus_set_resource(dev, SYS_RES_IOPORT, VGA_RES_CRTC,
- (sc->vga_mono) ? VGA_IO1_MONO : VGA_IO1_COLOR, VGA_IO1_SIZE);
- error = vga_pci_alloc(dev, sc, SYS_RES_IOPORT, VGA_RES_CRTC);
- if (error)
- return (error);
-
return (vga_attach(dev));
}
==== //depot/projects/tty/sys/dev/vga/vga_con.c#2 (text+ko) ====
@@ -56,14 +56,11 @@
return (-1);
vga_console.vga_fb = cd.fb;
- vga_console.vga_screen = cd.fb;
vga_console.vga_reg = cd.reg;
- vga_console.vga_crtc = cd.crtc;
if (!vga_probe(&vga_console))
return (-1);
- vga_console.vga_mono = vga_is_mono(&vga_console.vga_reg);
return (0);
}
==== //depot/projects/tty/sys/dev/vga/vga_cpu_alpha.c#4 (text+ko) ====
@@ -42,8 +42,6 @@
cd->fb.bst = busspace_isa_mem;
cd->fb.bsh = VGA_MEM_BASE;
cd->reg.bst = busspace_isa_io;
- cd->reg.bsh = VGA_IO0_BASE;
- cd->crtc.bst = busspace_isa_io;
- cd->crtc.bsh = (vga_is_mono(&cd->reg)) ? VGA_IO1_MONO : VGA_IO1_COLOR;
+ cd->reg.bsh = VGA_REG_BASE;
return (0);
}
==== //depot/projects/tty/sys/dev/vga/vga_cpu_amd64.c#4 (text+ko) ====
@@ -48,8 +48,6 @@
cd->fb.bst = AMD64_BUS_SPACE_MEM;
cd->fb.bsh = KERNBASE + VGA_MEM_BASE;
cd->reg.bst = AMD64_BUS_SPACE_IO;
- cd->reg.bsh = VGA_IO0_BASE;
- cd->crtc.bst = AMD64_BUS_SPACE_IO;
- cd->crtc.bsh = (vga_is_mono(&cd->reg)) ? VGA_IO1_MONO : VGA_IO1_COLOR;
+ cd->reg.bsh = VGA_REG_BASE;
return (0);
}
==== //depot/projects/tty/sys/dev/vga/vga_cpu_i386.c#5 (text+ko) ====
@@ -48,8 +48,6 @@
cd->fb.bst = I386_BUS_SPACE_MEM;
cd->fb.bsh = KERNBASE + VGA_MEM_BASE;
cd->reg.bst = I386_BUS_SPACE_IO;
- cd->reg.bsh = VGA_IO0_BASE;
- cd->crtc.bst = I386_BUS_SPACE_IO;
- cd->crtc.bsh = (vga_is_mono(&cd->reg)) ? VGA_IO1_MONO : VGA_IO1_COLOR;
+ cd->reg.bsh = VGA_REG_BASE;
return (0);
}
==== //depot/projects/tty/sys/dev/vga/vga_cpu_ia64.c#4 (text+ko) ====
@@ -42,8 +42,6 @@
cd->fb.bst = IA64_BUS_SPACE_MEM;
cd->fb.bsh = IA64_PHYS_TO_RR6(VGA_MEM_BASE);
cd->reg.bst = IA64_BUS_SPACE_IO;
- cd->reg.bsh = VGA_IO0_BASE;
- cd->crtc.bst = IA64_BUS_SPACE_IO;
- cd->crtc.bsh = (vga_is_mono(&cd->reg)) ? VGA_IO1_MONO : VGA_IO1_COLOR;
+ cd->reg.bsh = VGA_REG_BASE;
return (0);
}
==== //depot/projects/tty/sys/dev/vga/vga_cpu_sparc64.c#3 (text+ko) ====
@@ -42,7 +42,7 @@
int
vga_get_console(struct vga_consdata *cd)
{
- static struct bus_space_tag bst_store[3];
+ static struct bus_space_tag bst_store[2];
char odev[32];
ihandle_t stdout;
phandle_t chosen, oh, options;
@@ -75,9 +75,5 @@
cd->reg.bst = &bst_store[1];
cd->reg.bsh = sparc64_fake_bustag(PCI_IO_BUS_SPACE, 0x1fe020003c0,
cd->reg.bst);
- cd->crtc.bst = &bst_store[2];
- cd->crtc.bsh = (vga_is_mono(&cd->reg)) ?
- sparc64_fake_bustag(PCI_IO_BUS_SPACE, 0x1fe020003b0, cd->crtc.bst) :
- sparc64_fake_bustag(PCI_IO_BUS_SPACE, 0x1fe020003d0, cd->crtc.bst);
return (0);
}
More information about the p4-projects
mailing list