PERFORCE change 80029 for review

[Peter Wemm]

http://perforce.freebsd.org/chv.cgi?CH=80029

Change 80029 by peter at peter_daintree on 2005/07/11 23:09:47

	Intel -b i386_hammer (this revives some stuff from the grave, I'm not sure
	how p4 dug this stuff up)

Affected files ...

.. //depot/projects/hammer/sys/amd64/amd64/dump_machdep.c#25 integrate
.. //depot/projects/hammer/sys/amd64/amd64/exception.S#41 integrate
.. //depot/projects/hammer/sys/amd64/amd64/fpu.c#29 integrate
.. //depot/projects/hammer/sys/amd64/amd64/initcpu.c#14 integrate
.. //depot/projects/hammer/sys/amd64/amd64/machdep.c#138 integrate
.. //depot/projects/hammer/sys/amd64/amd64/vm_machdep.c#76 integrate
.. //depot/projects/hammer/sys/amd64/conf/NOTES#74 integrate
.. //depot/projects/hammer/sys/amd64/include/_types.h#15 integrate
.. //depot/projects/hammer/sys/amd64/include/atomic.h#16 integrate
.. //depot/projects/hammer/sys/amd64/isa/clock.c#45 integrate

Differences ...

==== //depot/projects/hammer/sys/amd64/amd64/dump_machdep.c#25 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/amd64/exception.S#41 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/amd64/fpu.c#29 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/amd64/initcpu.c#14 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/amd64/machdep.c#138 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/amd64/vm_machdep.c#76 (text+ko) ====

@@ -359,6 +359,20 @@
 	return (0);
 }
 
+/*
+ * Convert kernel VA to physical address
+ */
+vm_paddr_t
+kvtop(void *addr)
+{
+	vm_paddr_t pa;
+
+	pa = pmap_kextract((vm_offset_t)addr);
+	if (pa == 0)
+		panic("kvtop: zero page frame");
+	return (pa);
+}
+
 #ifdef SMP
 static void
 cpu_reset_proxy()

==== //depot/projects/hammer/sys/amd64/conf/NOTES#74 (text+ko) ====

@@ -4,7 +4,7 @@
 # This file contains machine dependent kernel configuration notes.  For
 # machine independent notes, look in /sys/conf/NOTES.
 #
-# (XXX from i386:NOTES,v 1.1201)
+# (XXX from i386:NOTES,v 1.1202)
 # $FreeBSD: src/sys/amd64/conf/NOTES,v 1.36 2005/06/30 05:33:25 peter Exp $
 #
 

==== //depot/projects/hammer/sys/amd64/include/_types.h#15 (text+ko) ====


==== //depot/projects/hammer/sys/amd64/include/atomic.h#16 (text+ko) ====

@@ -152,10 +152,35 @@
 	return (res);
 }
 
+#if defined(_KERNEL) && !defined(SMP)
+
+/*
+ * We assume that a = b will do atomic loads and stores.  However, on a
+ * PentiumPro or higher, reads may pass writes, so for that case we have
+ * to use a serializing instruction (i.e. with LOCK) to do the load in
+ * SMP kernels.  For UP kernels, however, the cache of the single processor
+ * is always consistent, so we don't need any memory barriers.
+ */
 #define	ATOMIC_STORE_LOAD(TYPE, LOP, SOP)		\
 static __inline u_##TYPE				\
 atomic_load_acq_##TYPE(volatile u_##TYPE *p)		\
 {							\
+	return (*p);					\
+}							\
+							\
+static __inline void					\
+atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
+{							\
+	*p = v;						\
+}							\
+struct __hack
+
+#else /* defined(SMP) */
+
+#define	ATOMIC_STORE_LOAD(TYPE, LOP, SOP)		\
+static __inline u_##TYPE				\
+atomic_load_acq_##TYPE(volatile u_##TYPE *p)		\
+{							\
 	u_##TYPE res;					\
 							\
 	__asm __volatile(__XSTRING(MPLOCKED) LOP	\
@@ -179,6 +204,8 @@
 }							\
 struct __hack
 
+#endif /* SMP */
+
 #endif /* KLD_MODULE || !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
 
 ATOMIC_ASM(set,	     char,  "orb %b1,%0",  "iq",  v);

==== //depot/projects/hammer/sys/amd64/isa/clock.c#45 (text+ko) ====