PERFORCE change 71413 for review

[Olivier Houchard]

http://perforce.freebsd.org/chv.cgi?CH=71413

Change 71413 by cognet at cognet on 2005/02/20 21:28:50

	Bring back the good locore.S, not an elder copy I had on an
	another box.

Affected files ...

.. //depot/projects/arm/src/sys/arm/arm/locore.S#5 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/arm/locore.S#5 (text+ko) ====

@@ -1,8 +1,6 @@
-<<<<<<< locore.S
-=======
 /*	$NetBSD: locore.S,v 1.14 2003/04/20 16:21:40 thorpej Exp $	*/
 
-/*
+/*-
  * Copyright (C) 1994-1997 Mark Brinicombe
  * Copyright (C) 1994 Brini
  * All rights reserved.
@@ -39,7 +37,7 @@
 #include <machine/asm.h>
 #include <machine/armreg.h>
 #include <machine/pte.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.4 2004/09/28 14:37:08 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.8 2005/01/23 22:08:31 cognet Exp $");
 
 /* What size should this really be ? It is only used by init_arm() */
 #define INIT_ARM_STACK_SIZE	2048
@@ -67,6 +65,7 @@
 
 ASENTRY_NP(_start)
 	
+
 	/* Check if we are running on RAM, if not move ourself to RAM */
 #if 0
 	cmp	pc, #PHYSADDR
@@ -131,7 +130,10 @@
 3:	
 	ldmia	r4!, {r1,r2,r3}   /* # of sections, PA|attr, VA */
 	cmp	r1, #0
-	bne	2b	
+	adrne	r5, 2b
+	bicne	r5, r5, #0xff000000
+	orrne	r5, r5, #PHYSADDR
+	movne	pc, r5
 
 	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
 	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */
@@ -159,6 +161,22 @@
 	subs	r2, r2, #4
 	bgt	.L1
 
+	ldr	r4, =KERNVIRTADDR
+	cmp	pc, r4
+#if	KERNVIRTADDR > KERNPHYSADDR
+	bgt	virt_done
+	ldr	r4, =KERNVIRTADDR
+	ldr	r5, =KERNPHYSADDR
+	sub	r4, r4, r5
+	add	pc, pc, r4
+#else
+	blt	virt_done
+	ldr	r4, =KERNPHYSADDR
+	ldr	r5, =KERNVIRTADDR
+	sub	r4, r4, r5
+	sub	pc, pc, r4
+#endif
+virt_done:
 	ldr	fp, =KERNVIRTADDR	/* trace back starts here */
 	bl	_C_LABEL(initarm)	/* Off we go */
 
@@ -180,12 +198,10 @@
 	.word	STARTUP_PAGETABLE_ADDR
 mmu_init_table:	
 	/* fill all table VA==PA */
-	MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
 	/* map SDRAM VA==PA, WT cacheable */
 	MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
 	/* map VA 0xc0000000..0xc3ffffff to PA */
 	MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-	MMU_INIT(0xfe800000, 0xfe800000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
 
 	.word 0	/* end of table */
 #endif
@@ -306,12 +322,12 @@
 ENTRY(setjmp)
 	stmia	r0, {r4-r14}
 	mov	r0, #0x00000000
-	mov	pc, lr
+	RET
 
 ENTRY(longjmp)
 	ldmia	r0, {r4-r14}
 	mov	r0, #0x00000001
-	mov	pc, lr
+	RET
 
 	.data
 	.global _C_LABEL(esym)
@@ -338,4 +354,3 @@
 szsigcode:
 	.long esigcode-sigcode
 /* End of locore.S */
->>>>>>> 1.4