PERFORCE change 49437 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=49437

Change 49437 by jmallett at jmallett_oingo on 2004/03/20 21:24:34

	Handle misses/reloads with the same body of code.  This means
	the common case (miss, not reload) takes an extra branch...  Ha.

Affected files ...

.. //depot/projects/mips/sys/mips/mips/exception.S#26 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/exception.S#26 (text+ko) ====

@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $P4: //depot/projects/mips/sys/mips/mips/exception.S#25 $
+ * $P4: //depot/projects/mips/sys/mips/mips/exception.S#26 $
  */
 
 #include "opt_ddb.h"
@@ -49,8 +49,8 @@
 ExceptionHandlerTable:
 	.dword	GenericException	/* Int */
 	.dword	GenericException	/* TLBMod */
-	.dword	XTLBReload		/* TLBL */
-	.dword	XTLBReload		/* TLBS */
+	.dword	XTLBMissVector		/* TLBL */
+	.dword	XTLBMissVector		/* TLBS */
 	.dword	GenericException	/* AdEL */
 	.dword	GenericException	/* AdES */
 	.dword	GenericException	/* IBE */
@@ -184,26 +184,8 @@
 /*
  * XXX kernel only.  For now that makes sense.
  */
-LEAF(XTLBReload)
+LEAF(XTLBMissVector)
 	.set noat
-	tlbp
-	nop
-	mfc0	k0, MIPS_COP_0_TLB_INDEX
-	nop
-	blezl	k0, 1f
-	nop
-	/* We have an index, it's a reload.  XXX Copying from XTLBMiss
-	 * because I can't make that tlbwi, unless I pick a random
-	 * Index for it, and somehow that doesn't feel good.  XXX2 Note
-	 * that TLBS is just a degenerate case of Mod, it's where the
-	 * mapping needs set up into the TLB, as well, cause it was
-	 * created after the other entry in the TLB, and is invalid
-	 * in the TLB.  It actually could go through the Mod code and
-	 * work fine, but I'd rather take two exceptions.  The other
-	 * side of this argument is that tlb_enter should update the
-	 * TLB.  This is possibly true, but I like lazy loading, since
-	 * we have to reload a lot in theory, anyway.
-	 */
 	dmfc0	k0, MIPS_COP_0_BAD_VADDR
 	dli	k1, MIPS_XKSEG_START
 	tltu	k0, k1
@@ -232,47 +214,16 @@
 	dmtc0	k0, MIPS_COP_0_TLB_LO0
 	dmtc0	k1, MIPS_COP_0_TLB_LO1
 	nop
+
+	tlbp
+	mfc0	k0, MIPS_COP_0_TLB_INDEX
+	nop
+	bltz	k0, 1f
+	nop
+
 	tlbwi
 	eret
-	/* Not in TLB, it's a miss. */
-1:	j	XTLBMissVector
-	nop
-	.set at
-END(XTLBReload)
-
-/*
- * XXX kernel only.  For now that makes sense.
- */
-LEAF(XTLBMissVector)
-	.set noat
-	dmfc0	k0, MIPS_COP_0_BAD_VADDR
-	dli	k1, MIPS_XKSEG_START
-	tltu	k0, k1
-	dsubu	k0, k1
-	/*
-	 * Shift right logical to get a page index, but leaving
-	 * enough bits to index an array of 64 bit values, plus
-	 * align for the even/odd TLB stuff.
-	 */
-	dsrl	k0, PAGE_SHIFT + 1
-	dsll	k0, 3 + 1
-	dla	k1, kptmap
-	/*
-	 * Find the page table, and index it.
-	 */
-	ld	k1, 0(k1)
-	addu	k1, k0
-	/*
-	 * Write the pair.
-	 */
-	ld	k0, 0(k1)	/* Even PTE. */
-	ld	k1, 8(k1)	/* Odd PTE. */
-	/*
-	 * Write TLB entry.
-	 */
-	dmtc0	k0, MIPS_COP_0_TLB_LO0
-	dmtc0	k1, MIPS_COP_0_TLB_LO1
-	nop
+1:
 	tlbwr
 	eret
 	.set at