PERFORCE change 48334 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=48334

Change 48334 by jmallett at jmallett_oingo on 2004/03/06 23:30:02

	Initial scribblings of cache attrs for pte's.

Affected files ...

.. //depot/projects/mips/sys/mips/include/pte.h#21 edit

Differences ...

==== //depot/projects/mips/sys/mips/include/pte.h#21 (text+ko) ====

@@ -80,10 +80,7 @@
 
 /*
  * TLB flags managed in hardware:
- * 	C:	We ignore this field, as it will only give us a
- * 		headache in certain CPUs.  Better not to bother for
- * 		now, though in time we may want to support multiple
- * 		cache schemes for VM.
+ * 	C:	Cache attribute.
  * 	D:	Dirty bit.  This means a page is writable.  It is not
  * 		set at first, and a write is trapped, and the dirty
  * 		bit is set.  See also PG_RO.
@@ -92,9 +89,11 @@
  * 		in EVERY address space, and to ignore the ASID when
  * 		it is matched.
  */
-#define	PG_D	0x04
-#define	PG_V	0x02
-#define	PG_G	0x01
+#define	PG_C(attr)	((attr & 0x07) << 3)
+#define	PG_C_UNCACHED	(PG_C(0x02))
+#define	PG_D		0x04
+#define	PG_V		0x02
+#define	PG_G		0x01
 
 /*
  * VM flags managed in software: