PERFORCE change 55016 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=55016

Change 55016 by jmallett at jmallett_oingo on 2004/06/15 12:38:03

	Kill locore_mips3.S.  Just gut the MIPS32/MIPS64 functions for now,
	as I'm purposely rolling back to something simpler, and again, this
	was part of accomodating NetBSD before I understood a lot of the
	extremities here.  Replace setjmp/longjmp with versions copied from
	my savectx/cpu_throw in swtch.S.  Tested the latter with ddb and a
	simple "call yourmom" which correctly returned to the db> prompt
	rather than panicking :)

Affected files ...

.. //depot/projects/mips/sys/conf/files.mips#38 edit
.. //depot/projects/mips/sys/mips/include/locore.h#14 edit
.. //depot/projects/mips/sys/mips/mips/db_interface.c#16 edit
.. //depot/projects/mips/sys/mips/mips/locore_mips3.S#15 delete
.. //depot/projects/mips/sys/mips/mips/support.S#11 edit

Differences ...

==== //depot/projects/mips/sys/conf/files.mips#38 (text+ko) ====

@@ -19,7 +19,6 @@
 mips/mips/exception.S		standard
 mips/mips/in_cksum.c		optional	inet
 mips/mips/locore.S		standard	no-obj
-mips/mips/locore_mips3.S	standard
 mips/mips/machdep.c		standard
 mips/mips/pmap.c		standard
 mips/mips/sig_machdep.c		standard

==== //depot/projects/mips/sys/mips/include/locore.h#14 (text+ko) ====

@@ -31,11 +31,6 @@
 
 struct tlb;
 
-uint32_t mipsNN_cp0_config1_read(void);
-void	mipsNN_cp0_config1_write(uint32_t);
-uint32_t mipsNN_cp0_config2_read(void);
-uint32_t mipsNN_cp0_config3_read(void);
-
 /*
  * CPU identification, from PRID register.
  */

==== //depot/projects/mips/sys/mips/mips/db_interface.c#16 (text+ko) ====

@@ -352,8 +352,6 @@
 
 DB_COMMAND(cp0, db_cp0dump_cmd)
 {
-	uint32_t val;
-
 	SHOW32(MIPS_COP_0_TLB_INDEX, "index");
 	SHOW32(MIPS_COP_0_TLB_RANDOM, "random");
 
@@ -381,9 +379,6 @@
 	SHOW32(MIPS_COP_0_PRID, "prid");
 	SHOW32(MIPS_COP_0_CONFIG, "config");
 
-	val = mipsNN_cp0_config1_read();
-	printf("  config1:    %#x\n", val);
-
 	SHOW64(MIPS_COP_0_LLADDR, "lladdr");
 	SHOW64(MIPS_COP_0_WATCH_LO, "watchlo");
 

==== //depot/projects/mips/sys/mips/mips/support.S#11 (text+ko) ====

@@ -26,9 +26,13 @@
  * $FreeBSD$
  */
 
+#include "opt_ddb.h"
+
 #include <machine/asm.h>
 #include <machine/cpuregs.h>
 
+#include "assym.s"
+
 /*
  * If an unaligned access occurs, someone is doing something wrong, don't
  * fixup here, let things happen elsewhere, if at all.  We shouldn't suck.
@@ -281,3 +285,53 @@
 	jr	ra
 	nop
 END(copyinstr)
+
+#ifdef DDB
+
+/*
+ * setjmp(9)
+ * <v0>int setjmp(<a0>jmp_buf)
+ */
+ENTRY(setjmp)
+	mfc0	t0, MIPS_COP_0_STATUS
+	sd	s0, SF_REG_S0(a0)
+	sd	s1, SF_REG_S1(a0)
+	sd	s2, SF_REG_S2(a0)
+	sd	s3, SF_REG_S3(a0)
+	sd	s4, SF_REG_S4(a0)
+	sd	s5, SF_REG_S5(a0)
+	sd	s6, SF_REG_S6(a0)
+	sd	s7, SF_REG_S7(a0)
+	sd	s8, SF_REG_S8(a0)
+	sd	sp, SF_REG_SP(a0)
+	sd	t0, SF_REG_SR(a0)
+	sd	ra, SF_REG_RA(a0)
+	li	v0, 0
+	jr	ra
+	nop
+END(setjmp)
+
+/*
+ * longjmp(9)
+ * void longjmp(<a0>jmp_buf, <a1>retval)
+ */
+ENTRY(longjmp)
+	ld	s0, SF_REG_S0(a0)
+	ld	s1, SF_REG_S1(a0)
+	ld	s2, SF_REG_S2(a0)
+	ld	s3, SF_REG_S3(a0)
+	ld	s4, SF_REG_S4(a0)
+	ld	s5, SF_REG_S5(a0)
+	ld	s6, SF_REG_S6(a0)
+	ld	s7, SF_REG_S7(a0)
+	ld	s8, SF_REG_S8(a0)
+	ld	sp, SF_REG_SP(a0)
+	ld	ra, SF_REG_RA(a0)
+	ld	t0, SF_REG_SR(a0)
+	mtc0	t0, MIPS_COP_0_STATUS
+	move	v0, a1
+	jr	ra
+	nop
+END(longjmp)
+
+#endif /* DDB */