PERFORCE change 58403 for review

[John Baldwin]

http://perforce.freebsd.org/chv.cgi?CH=58403

Change 58403 by jhb at jhb_slimer on 2004/07/28 20:49:40

	Prompted by some questions on IRC from gibbs@, scottl@, and others:
	atomic_store_rel() on ia32 does not actually need a lock, just a
	simple store via mov will do.  Specifically, in section 7.2.2 of
	Volume 3: System Programming Guide of the IA32 Intel Arch Manuals,
	it states:
	
	  * Writes by a single processor are observed in the same order by
	    all processors.

Affected files ...

.. //depot/projects/smpng/sys/i386/include/atomic.h#13 edit

Differences ...

==== //depot/projects/smpng/sys/i386/include/atomic.h#13 (text+ko) ====

@@ -180,7 +180,7 @@
  * XXX: This is _NOT_ safe on a P6 or higher because it does not guarantee
  * memory ordering.  These should only be used on a 386.
  */
-#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)		\
+#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP, SCONS)	\
 static __inline u_##TYPE				\
 atomic_load_acq_##TYPE(volatile u_##TYPE *p)		\
 {							\
@@ -197,7 +197,7 @@
 
 #else /* !defined(I386_CPU) */
 
-#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)		\
+#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP, SCONS)	\
 static __inline u_##TYPE				\
 atomic_load_acq_##TYPE(volatile u_##TYPE *p)		\
 {							\
@@ -211,16 +211,13 @@
 	return (res);					\
 }							\
 							\
-/*							\
- * The XCHG instruction asserts LOCK automagically.	\
- */							\
 static __inline void					\
 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
 {							\
 	__asm __volatile(SOP				\
-	: "+m" (*p),			/* 0 */		\
-	  "+r" (v)			/* 1 */		\
-	: : "memory");				 	\
+	: "=m" (*p),			/* 0 */		\
+	: SCONS (v)			/* 1 */		\
+	: "memory");				 	\
 }							\
 struct __hack
 
@@ -230,7 +227,7 @@
 
 extern int atomic_cmpset_int(volatile u_int *, u_int, u_int);
 
-#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)				\
+#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP, SCONS)			\
 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p);		\
 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
 
@@ -258,10 +255,10 @@
 ATOMIC_ASM(add,	     long,  "addl %1,%0",  "ir",  v);
 ATOMIC_ASM(subtract, long,  "subl %1,%0",  "ir",  v);
 
-ATOMIC_STORE_LOAD(char,	"cmpxchgb %b0,%1", "xchgb %b1,%0");
-ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
-ATOMIC_STORE_LOAD(int,	"cmpxchgl %0,%1",  "xchgl %1,%0");
-ATOMIC_STORE_LOAD(long,	"cmpxchgl %0,%1",  "xchgl %1,%0");
+ATOMIC_STORE_LOAD(char,	"cmpxchgb %b0,%1", "movb %b1,%0", "iq");
+ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "movw %w1,%0", "ir");
+ATOMIC_STORE_LOAD(int,	"cmpxchgl %0,%1",  "movl %1,%0", "ir");
+ATOMIC_STORE_LOAD(long,	"cmpxchgl %0,%1",  "movl %1,%0", "ir");
 
 #undef ATOMIC_ASM
 #undef ATOMIC_STORE_LOAD