PERFORCE change 45757 for review
Peter Wemm
peter at FreeBSD.org
Thu Jan 22 17:51:31 PST 2004
http://perforce.freebsd.org/chv.cgi?CH=45757
Change 45757 by peter at peter_daintree on 2004/01/22 17:50:30
integrate -I -b i386_hammer
Affected files ...
.. //depot/projects/hammer/sys/amd64/amd64/cpu_switch.S#18 integrate
.. //depot/projects/hammer/sys/amd64/amd64/elf_machdep.c#13 integrate
.. //depot/projects/hammer/sys/amd64/amd64/local_apic.c#29 integrate
.. //depot/projects/hammer/sys/amd64/amd64/machdep.c#78 integrate
.. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#52 integrate
.. //depot/projects/hammer/sys/amd64/amd64/pmap.c#52 integrate
.. //depot/projects/hammer/sys/amd64/amd64/vm_machdep.c#26 integrate
.. //depot/projects/hammer/sys/amd64/include/cpu.h#9 integrate
.. //depot/projects/hammer/sys/amd64/include/md_var.h#21 integrate
.. //depot/projects/hammer/sys/amd64/include/profile.h#9 integrate
.. //depot/projects/hammer/sys/amd64/include/smp.h#15 integrate
.. //depot/projects/hammer/sys/amd64/include/specialreg.h#11 integrate
.. //depot/projects/hammer/sys/amd64/include/sysarch.h#11 integrate
.. //depot/projects/hammer/sys/amd64/isa/atpic.c#33 integrate
.. //depot/projects/hammer/sys/amd64/isa/icu.h#17 integrate
.. //depot/projects/hammer/sys/amd64/pci/pci_cfgreg.c#10 integrate
Differences ...
==== //depot/projects/hammer/sys/amd64/amd64/cpu_switch.S#18 (text+ko) ====
@@ -294,7 +294,9 @@
pushq %r13
pushq %r14
pushq %r15
- pushq $sw0_1
+ movq $0,%rdi
+ movq $0,%rsi
+ leaq sw0_1,%rdx
call __panic
sw0_1: .asciz "cpu_throw: no newthread supplied"
@@ -314,7 +316,9 @@
pushq %r13
pushq %r14
pushq %r15
- pushq $sw0_2
+ movq $0,%rdi
+ movq $0,%rsi
+ leaq sw0_2,%rdx
call __panic
sw0_2: .asciz "cpu_switch: no curthread supplied"
@@ -334,7 +338,9 @@
pushq %r13
pushq %r14
pushq %r15
- pushq $sw0_3
+ movq $0,%rdi
+ movq $0,%rsi
+ leaq sw0_3,%rdx
call __panic
sw0_3: .asciz "cpu_switch: no newthread supplied"
#endif
==== //depot/projects/hammer/sys/amd64/amd64/elf_machdep.c#13 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/amd64/local_apic.c#29 (text+ko) ====
@@ -605,6 +605,10 @@
if (retval != 0)
printf("%s: Failed to setup the local APIC: returned %d\n",
best_enum->apic_name, retval);
+#ifdef SMP
+ /* Last, setup the cpu topology now that we have probed CPUs */
+ mp_topology();
+#endif
}
SYSINIT(apic_setup_local, SI_SUB_CPU, SI_ORDER_FIRST, apic_setup_local, NULL)
==== //depot/projects/hammer/sys/amd64/amd64/machdep.c#78 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#52 (text+ko) ====
@@ -78,10 +78,10 @@
extern int nkpt;
/*
- * CPU topology map datastructures for HTT. (XXX)
+ * CPU topology map datastructures for HTT.
*/
-struct cpu_group mp_groups[MAXCPU];
-struct cpu_top mp_top;
+static struct cpu_group mp_groups[MAXCPU];
+static struct cpu_top mp_top;
struct cpu_top *smp_topology;
/* AP uses this during bootstrap. Do not staticize. */
@@ -142,6 +142,46 @@
static struct sysctl_ctx_list logical_cpu_clist;
static u_int bootMP_size;
+void
+mp_topology(void)
+{
+ struct cpu_group *group;
+ int logical_cpus;
+ int apic_id;
+ int groups;
+ int cpu;
+
+ /* Build the smp_topology map. */
+ /* Nothing to do if there is no HTT support. */
+ if ((cpu_feature & CPUID_HTT) == 0)
+ return;
+ logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
+ if (logical_cpus <= 1)
+ return;
+ group = &mp_groups[0];
+ groups = 1;
+ for (cpu = 0, apic_id = 0; apic_id < MAXCPU; apic_id++) {
+ if (!cpu_info[apic_id].cpu_present)
+ continue;
+ /*
+ * If the current group has members and we're not a logical
+ * cpu, create a new group.
+ */
+ if (group->cg_count != 0 && (apic_id % logical_cpus) == 0) {
+ group++;
+ groups++;
+ }
+ group->cg_count++;
+ group->cg_mask |= 1 << cpu;
+ cpu++;
+ }
+
+ mp_top.ct_count = groups;
+ mp_top.ct_group = mp_groups;
+ smp_topology = &mp_top;
+}
+
+
/*
* Calculate usable address in base memory for AP trampoline code.
*/
==== //depot/projects/hammer/sys/amd64/amd64/pmap.c#52 (text+ko) ====
@@ -1420,6 +1420,7 @@
m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I]);
m->wire_count--;
atomic_subtract_int(&cnt.v_wire_count, 1);
+ /* XXX check if we can vm_page_free_zero here! */
vm_page_free(m);
vm_page_unlock_queues();
}
==== //depot/projects/hammer/sys/amd64/amd64/vm_machdep.c#26 (text+ko) ====
@@ -45,38 +45,38 @@
#include "opt_isa.h"
#include "opt_kstack_pages.h"
+#include "opt_cpu.h"
#include <sys/param.h>
#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/kse.h>
#include <sys/bio.h>
#include <sys/buf.h>
-#include <sys/vnode.h>
-#include <sys/vmmeter.h>
+#include <sys/kse.h>
#include <sys/kernel.h>
#include <sys/ktr.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/mutex.h>
+#include <sys/proc.h>
+#include <sys/sf_buf.h>
#include <sys/smp.h>
-#include <sys/sf_buf.h>
#include <sys/sysctl.h>
#include <sys/unistd.h>
+#include <sys/user.h>
+#include <sys/vnode.h>
+#include <sys/vmmeter.h>
#include <machine/cpu.h>
#include <machine/md_var.h>
#include <machine/pcb.h>
#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <sys/lock.h>
+#include <vm/vm_extern.h>
#include <vm/vm_kern.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-
-#include <sys/user.h>
+#include <vm/vm_param.h>
#include <amd64/isa/isa.h>
==== //depot/projects/hammer/sys/amd64/include/cpu.h#9 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/include/md_var.h#21 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/include/profile.h#9 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/include/smp.h#15 (text+ko) ====
@@ -60,6 +60,7 @@
void forwarded_hardclock(struct clockframe frame);
u_int mp_bootaddress(u_int);
int mp_grab_cpu_hlt(void);
+void mp_topology(void);
void smp_invlpg(vm_offset_t addr);
void smp_masked_invlpg(u_int mask, vm_offset_t addr);
void smp_invlpg_range(vm_offset_t startva, vm_offset_t endva);
==== //depot/projects/hammer/sys/amd64/include/specialreg.h#11 (text+ko) ====
@@ -159,6 +159,9 @@
#define MSR_MCG_CTL 0x17b
#define MSR_EVNTSEL0 0x186
#define MSR_EVNTSEL1 0x187
+#define MSR_THERM_CONTROL 0x19a
+#define MSR_THERM_INTERRUPT 0x19b
+#define MSR_THERM_STATUS 0x19c
#define MSR_DEBUGCTLMSR 0x1d9
#define MSR_LASTBRANCHFROMIP 0x1db
#define MSR_LASTBRANCHTOIP 0x1dc
==== //depot/projects/hammer/sys/amd64/include/sysarch.h#11 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/isa/atpic.c#33 (text+ko) ====
@@ -62,15 +62,23 @@
#define MASTER 0
#define SLAVE 1
+/*
+ * Determine the base master and slave modes not including auto EOI support.
+ * All machines that FreeBSD supports use 8086 mode.
+ */
+#define BASE_MASTER_MODE ICW4_8086
+#define BASE_SLAVE_MODE ICW4_8086
+
+/* Enable automatic EOI if requested. */
#ifdef AUTO_EOI_1
-#define MASTER_MODE (ICW4_8086 | ICW4_AEOI)
+#define MASTER_MODE (BASE_MASTER_MODE | ICW4_AEOI)
#else
-#define MASTER_MODE ICW4_8086
+#define MASTER_MODE BASE_MASTER_MODE
#endif
#ifdef AUTO_EOI_2
-#define SLAVE_MODE (ICW4_8086 | ICW4_AEOI)
+#define SLAVE_MODE (BASE_SLAVE_MODE | ICW4_AEOI)
#else
-#define SLAVE_MODE ICW4_8086
+#define SLAVE_MODE BASE_SLAVE_MODE
#endif
static void atpic_init(void *dummy);
==== //depot/projects/hammer/sys/amd64/isa/icu.h#17 (text+ko) ====
==== //depot/projects/hammer/sys/amd64/pci/pci_cfgreg.c#10 (text+ko) ====
@@ -286,7 +286,7 @@
devmax = 32;
outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK);
- outb(CONF1_ADDR_PORT + 3, 0);
+ DELAY(1);
mode1res = inl(CONF1_ADDR_PORT);
outl(CONF1_ADDR_PORT, oldval1);
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