PERFORCE change 37937 for review
Peter Wemm
peter at FreeBSD.org
Thu Sep 11 14:45:02 PDT 2003
http://perforce.freebsd.org/chv.cgi?CH=37937
Change 37937 by peter at peter_work on 2003/09/11 14:44:11
initial sweep over jhb's diffs that affect files for the smp
cleanup. Note that the core smp code isn't all there yet.
Affected files ...
.. //depot/projects/hammer/sys/amd64/amd64/autoconf.c#7 edit
.. //depot/projects/hammer/sys/amd64/amd64/db_trace.c#9 edit
.. //depot/projects/hammer/sys/amd64/amd64/exception.S#17 edit
.. //depot/projects/hammer/sys/amd64/amd64/genassym.c#21 edit
.. //depot/projects/hammer/sys/amd64/amd64/machdep.c#49 edit
.. //depot/projects/hammer/sys/amd64/amd64/nexus.c#11 edit
.. //depot/projects/hammer/sys/amd64/amd64/pmap.c#31 edit
.. //depot/projects/hammer/sys/amd64/amd64/support.S#10 edit
.. //depot/projects/hammer/sys/amd64/amd64/trap.c#26 edit
.. //depot/projects/hammer/sys/amd64/include/asmacros.h#6 edit
.. //depot/projects/hammer/sys/amd64/include/pcpu.h#8 edit
.. //depot/projects/hammer/sys/amd64/isa/clock.c#7 edit
.. //depot/projects/hammer/sys/amd64/isa/icu.h#6 edit
.. //depot/projects/hammer/sys/amd64/pci/pci_bus.c#7 edit
.. //depot/projects/hammer/sys/dev/pci/pci.c#13 edit
.. //depot/projects/hammer/sys/dev/sio/sio.c#19 edit
.. //depot/projects/hammer/sys/kern/kern_intr.c#13 edit
.. //depot/projects/hammer/sys/kern/subr_smp.c#7 edit
.. //depot/projects/hammer/sys/kern/subr_witness.c#17 edit
Differences ...
==== //depot/projects/hammer/sys/amd64/amd64/autoconf.c#7 (text+ko) ====
@@ -76,7 +76,6 @@
#include <nfsclient/nfsdiskless.h>
#include <machine/md_var.h>
-#include <amd64/isa/icu.h>
#ifdef DEV_ISA
#include <isa/isavar.h>
@@ -109,23 +108,11 @@
{
/*
- * Activate the ICU's. Note that we are explicitly at splhigh()
- * at present as we have no way to disable stray PCI level triggered
- * interrupts until the devices have had a driver attached. This
- * is particularly a problem when the interrupts are shared. For
- * example, if IRQ 10 is shared between a disk and network device
- * and the disk device generates an interrupt, if we "activate"
- * IRQ 10 when the network driver is set up, then we will get
- * recursive interrupt 10's as nothing will know how to turn off
- * the disk device's interrupt.
- *
- * Having the ICU's active means we can probe interrupt routing to
- * see if a device causes the corresponding pending bit to be set.
- *
- * This is all rather inconvenient.
+ * Enable interrupts on the processor. The interrupts are still
+ * disabled in the interrupt controllers until interrupt handlers
+ * are registered.
*/
enable_intr();
- INTREN(IRQ_SLAVE);
/* nexus0 is the top of the i386 device tree */
device_add_child(root_bus, "nexus", 0);
@@ -141,12 +128,6 @@
if (isa_bus_device)
isa_probe_children(isa_bus_device);
#endif
-
- /*
- * Now we're ready to handle (pending) interrupts.
- * XXX this is slightly misplaced.
- */
- spl0();
}
static void
==== //depot/projects/hammer/sys/amd64/amd64/db_trace.c#9 (text+ko) ====
@@ -245,8 +245,9 @@
if (strcmp(name, "calltrap") == 0 ||
strcmp(name, "fork_trampoline") == 0)
frame_type = TRAP;
- else if (strncmp(name, "Xintr", 5) == 0 ||
- strncmp(name, "Xfastintr", 9) == 0)
+ else if (strncmp(name, "Xatpic_intr", 11) == 0 ||
+ strncmp(name, "Xatpic_fastintr", 15) == 0)
+ strncmp(name, "Xapic_isr", 9) == 0)
frame_type = INTERRUPT;
else if (strcmp(name, "Xfast_syscall") == 0)
frame_type = SYSCALL;
==== //depot/projects/hammer/sys/amd64/amd64/exception.S#17 (text+ko) ====
@@ -35,7 +35,6 @@
*/
#include <machine/asmacros.h>
-#include <sys/mutex.h>
#include <machine/psl.h>
#include <machine/trap.h>
@@ -72,8 +71,6 @@
* %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
* must load them with appropriate values for supervisor mode operation.
*/
-#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(X,name); \
- .type __CONCAT(X,name), at function; __CONCAT(X,name):
MCOUNT_LABEL(user)
MCOUNT_LABEL(btrap)
@@ -301,14 +298,6 @@
MEXITCOUNT
jmp doreti /* Handle any ASTs */
-
-/*
- * Include what was once config+isa-dependent code.
- * XXX it should be in a stand-alone file. It's still icu-dependent and
- * belongs in i386/isa.
- */
-#include "amd64/isa/vector.S"
-
.data
ALIGN_DATA
@@ -413,5 +402,3 @@
movq $T_PROTFLT,TF_TRAPNO(%rsp)
movq $0,TF_ERR(%rsp) /* XXX should be the error code */
jmp alltraps_with_regs_pushed
-
-#include "amd64/isa/icu_ipl.S"
==== //depot/projects/hammer/sys/amd64/amd64/genassym.c#21 (text+ko) ====
@@ -69,6 +69,7 @@
#include <nfs/rpcv2.h>
#include <nfsclient/nfs.h>
#include <nfsclient/nfsdiskless.h>
+#include <machine/apicreg.h>
#include <machine/cpu.h>
#include <machine/sigframe.h>
#include <machine/proc.h>
@@ -181,6 +182,7 @@
ASSYM(ENOENT, ENOENT);
ASSYM(EFAULT, EFAULT);
ASSYM(ENAMETOOLONG, ENAMETOOLONG);
+ASSYM(MAXCOMLEN, MAXCOMLEN);
ASSYM(MAXPATHLEN, MAXPATHLEN);
ASSYM(PC_SIZEOF, sizeof(struct pcpu));
ASSYM(PC_PRVSPACE, offsetof(struct pcpu, pc_prvspace));
@@ -190,6 +192,15 @@
ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
ASSYM(PC_SCRATCH_RSP, offsetof(struct pcpu, pc_scratch_rsp));
+ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap));
+
+ASSYM(LA_VER, offsetof(struct LAPIC, version));
+ASSYM(LA_TPR, offsetof(struct LAPIC, tpr));
+ASSYM(LA_EOI, offsetof(struct LAPIC, eoi));
+ASSYM(LA_SVR, offsetof(struct LAPIC, svr));
+ASSYM(LA_ICR_LO, offsetof(struct LAPIC, icr_lo));
+ASSYM(LA_ICR_HI, offsetof(struct LAPIC, icr_hi));
+ASSYM(LA_ISR, offsetof(struct LAPIC, isr0));
ASSYM(KCSEL, GSEL(GCODE_SEL, SEL_KPL));
ASSYM(KDSEL, GSEL(GDATA_SEL, SEL_KPL));
==== //depot/projects/hammer/sys/amd64/amd64/machdep.c#49 (text+ko) ====
@@ -100,6 +100,7 @@
#include <machine/reg.h>
#include <machine/clock.h>
#include <machine/specialreg.h>
+#include <machine/intr_machdep.h>
#include <machine/md_var.h>
#include <machine/metadata.h>
#include <machine/proc.h>
@@ -108,8 +109,6 @@
#endif
#include <machine/tss.h>
-#include <amd64/isa/icu.h>
-#include <amd64/isa/intr_machdep.h>
#include <isa/rtc.h>
#include <sys/ptrace.h>
#include <machine/sigframe.h>
@@ -195,7 +194,6 @@
bufinit();
vm_pager_bufferinit();
- /* For SMP, we delay the cpu_setregs() until after SMP startup. */
cpu_setregs();
}
@@ -1203,7 +1201,7 @@
cninit();
#ifdef DEV_ISA
- isa_defaultirq();
+ atpic_startup();
#endif
#ifdef DDB
==== //depot/projects/hammer/sys/amd64/amd64/nexus.c#11 (text+ko) ====
@@ -46,10 +46,12 @@
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
+#include <sys/intr_machdep.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <machine/bus.h>
+#include <machine/intr_machdep.h>
#include <sys/rman.h>
#include <sys/interrupt.h>
@@ -64,8 +66,6 @@
#include <isa/isavar.h>
#include <amd64/isa/isa.h>
#endif
-#include <amd64/isa/icu.h>
-#include <amd64/isa/intr_machdep.h>
#include <sys/rtprio.h>
static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
@@ -156,14 +156,11 @@
* multi-ISA-bus systems. PCI interrupts are routed to the ISA
* component, so in a way, PCI can be a partial child of an ISA bus(!).
* APIC interrupts are global though.
- *
- * XXX We depend on the AT PIC driver correctly claiming IRQ 2
- * to prevent its reuse elsewhere.
*/
irq_rman.rm_start = 0;
irq_rman.rm_type = RMAN_ARRAY;
irq_rman.rm_descr = "Interrupt request lines";
- irq_rman.rm_end = 15;
+ irq_rman.rm_end = NUM_IO_INTS - 1;
if (rman_init(&irq_rman)
|| rman_manage_region(&irq_rman,
irq_rman.rm_start, irq_rman.rm_end))
@@ -429,7 +426,7 @@
if (error)
return (error);
- error = inthand_add(device_get_nameunit(child), irq->r_start,
+ error = intr_ad_handler(device_get_nameunit(child), irq->r_start,
ihand, arg, flags, cookiep);
return (error);
@@ -438,7 +435,7 @@
static int
nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
{
- return (inthand_remove(ih));
+ return (intr_remove_handler(ih));
}
static int
==== //depot/projects/hammer/sys/amd64/amd64/pmap.c#31 (text+ko) ====
@@ -133,6 +133,9 @@
#include <machine/cputypes.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
+#ifdef SMP
+#include <machine/smp.h>
+#endif
#define PMAP_KEEP_PDIRS
#ifndef PMAP_SHPGPERPROC
@@ -675,6 +678,8 @@
return 0;
}
+XXXX SMP VERSIONS
+
/*
* Normal invalidation functions.
* We inline these within pmap.c for speed.
==== //depot/projects/hammer/sys/amd64/amd64/support.S#10 (text+ko) ====
@@ -36,10 +36,21 @@
#include "opt_ddb.h"
#include <machine/asmacros.h>
+#include <machine/intr_machdep.h>
#include <machine/pmap.h>
#include "assym.s"
+ ALIGN_DATA
+ .globl intrcnt, eintrcnt
+intrcnt:
+ .space INTRCNT_COUNT * 4
+eintrcnt:
+
+ .globl intrnames, eintrnames
+intrnames:
+ .space INTRCNT_COUNT * (MAXCOMLEN + 1)
+eintrnames:
.text
==== //depot/projects/hammer/sys/amd64/amd64/trap.c#26 (text+ko) ====
@@ -79,13 +79,11 @@
#include <vm/vm_extern.h>
#include <machine/cpu.h>
+#include <machine/intr_machdep.h>
#include <machine/md_var.h>
#include <machine/pcb.h>
#include <machine/tss.h>
-#include <amd64/isa/icu.h>
-#include <amd64/isa/intr_machdep.h>
-
#include <ddb/ddb.h>
#include <sys/sysctl.h>
==== //depot/projects/hammer/sys/amd64/include/asmacros.h#6 (text+ko) ====
@@ -138,4 +138,13 @@
#define MEXITCOUNT
#endif /* GPROF */
+#ifdef LOCORE
+/*
+ * Convenience macros for declaring interrupt entry points.
+ */
+#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(X,name); \
+ .type __CONCAT(X,name), at function; __CONCAT(X,name):
+
+#endif /* LOCORE */
+
#endif /* !_MACHINE_ASMACROS_H_ */
==== //depot/projects/hammer/sys/amd64/include/pcpu.h#8 (text+ko) ====
@@ -41,6 +41,8 @@
#define PCPU_MD_FIELDS \
struct pcpu *pc_prvspace; /* Self-reference */ \
register_t pc_scratch_rsp; /* User %rsp in syscall */
+ XXXX add rest here
+ u_int pc_apic_id;
#if defined(lint)
==== //depot/projects/hammer/sys/amd64/isa/clock.c#7 (text+ko) ====
@@ -69,8 +69,12 @@
#include <machine/clock.h>
#include <machine/frame.h>
+#include <machine/intr_machdep.h>
#include <machine/md_var.h>
#include <machine/psl.h>
+#ifdef SMP
+#include <machine/smp.h>
+#endif
#include <machine/specialreg.h>
#include <amd64/isa/icu.h>
@@ -81,8 +85,6 @@
#endif
#include <amd64/isa/timerreg.h>
-#include <amd64/isa/intr_machdep.h>
-
/*
* 32-bit time_t's can't reach leap years before 1904 or after 2036, so we
* can use a simple formula for leap years.
@@ -128,6 +130,7 @@
static u_int32_t i8254_lastcount;
static u_int32_t i8254_offset;
static int i8254_ticked;
+static struct intsrc *i8254_intsrc;
/*
* XXX new_function and timer_func should not handle clockframes, but
* timer_func currently needs to hold hardclock to handle the
@@ -162,7 +165,7 @@
};
static void
-clkintr(struct clockframe frame)
+clkintr(struct clockframe *frame)
{
if (timecounter->tc_get_timecount == i8254_get_timecount) {
@@ -176,7 +179,7 @@
clkintr_pending = 0;
mtx_unlock_spin(&clock_lock);
}
- timer_func(&frame);
+ timer_func(frame);
switch (timer0_state) {
case RELEASED:
@@ -186,7 +189,7 @@
if ((timer0_prescaler_count += timer0_max_count)
>= hardclock_max_count) {
timer0_prescaler_count -= hardclock_max_count;
- hardclock(&frame);
+ hardclock(frame);
}
break;
@@ -218,7 +221,7 @@
timer0_prescaler_count = 0;
timer_func = hardclock;
timer0_state = RELEASED;
- hardclock(&frame);
+ hardclock(frame);
}
break;
}
@@ -333,16 +336,16 @@
* in the statistics, but the stat clock will no longer stop.
*/
static void
-rtcintr(struct clockframe frame)
+rtcintr(struct clockframe *frame)
{
while (rtcin(RTC_INTR) & RTCIR_PERIOD) {
if (profprocs != 0) {
if (--pscnt == 0)
pscnt = psdiv;
- profclock(&frame);
+ profclock(frame);
}
if (pscnt == psdiv)
- statclock(&frame);
+ statclock(frame);
}
}
@@ -845,12 +848,7 @@
profhz = RTC_PROFRATE;
}
- /* Finish initializing 8253 timer 0. */
- /*
- * XXX Check the priority of this interrupt handler. I
- * couldn't find anything suitable in the BSD/OS code (grog,
- * 19 July 2000).
- */
+ /* Finish initializing 8254 timer 0. */
inthand_add("clk", 0, (driver_intr_t *)clkintr, NULL,
INTR_TYPE_CLK | INTR_FAST, NULL);
crit = intr_disable();
@@ -870,8 +868,9 @@
if (diag != 0)
printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
- inthand_add("rtc", 8, (driver_intr_t *)rtcintr, NULL,
+ intr_add_handler("rtc", 8, (driver_intr_t *)rtcintr, NULL,
INTR_TYPE_CLK | INTR_FAST, NULL);
+ i8254_intsrc = intr_lookup_source(8);
crit = intr_disable();
mtx_lock_spin(&icu_lock);
@@ -943,8 +942,8 @@
if (count < i8254_lastcount ||
(!i8254_ticked && (clkintr_pending ||
((count < 20 || (!(rflags & PSL_I) && count < timer0_max_count / 2u)) &&
- (inb(IO_ICU1) & 1)))
- )) {
+ i8254_intsrc != NULL &&
+ i8254_intsrc->is_pic->pic_source_pending(i8254_intsrc))))) {
i8254_ticked = 1;
i8254_offset += timer0_max_count;
}
==== //depot/projects/hammer/sys/amd64/isa/icu.h#6 (text+ko) ====
@@ -45,24 +45,6 @@
#ifndef _I386_ISA_ICU_H_
#define _I386_ISA_ICU_H_
-#ifndef LOCORE
-
-/*
- * Note:
- * Most of the SMP equivilants of the icu macros are coded
- * elsewhere in an MP-safe fashion.
- * In particular note that the 'imen' variable is opaque.
- * DO NOT access imen directly, use INTREN()/INTRDIS().
- */
-
-void INTREN(u_int);
-void INTRDIS(u_int);
-
-extern unsigned imen; /* interrupt mask enable */
-
-#endif /* LOCORE */
-
-
/*
* Interrupt enable bits - in normal order of priority (which we change)
*/
==== //depot/projects/hammer/sys/amd64/pci/pci_bus.c#7 (text+ko) ====
@@ -426,7 +426,7 @@
if (pci_cfgregopen() == 0)
return ENXIO;
- return 0;
+ return -100;
}
static int
==== //depot/projects/hammer/sys/dev/pci/pci.c#13 (text+ko) ====
@@ -800,7 +800,7 @@
}
if (cfg->intpin > 0 && PCI_INTERRUPT_VALID(cfg->intline)) {
-#if defined(__ia64__) || (defined(__i386__) && !defined(SMP))
+#if defined(__ia64__) || (defined(__i386__) && !defined(SMP)) || defined(__amd64__)
/*
* Try to re-route interrupts. Sometimes the BIOS or
* firmware may leave bogus values in these registers.
==== //depot/projects/hammer/sys/dev/sio/sio.c#19 (text+ko) ====
@@ -1153,6 +1153,9 @@
rid = 0;
com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
RF_ACTIVE);
+ if (com->irqres == NULL)
+ com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul,
+ ~0ul, 1, RF_ACTIVE | RF_SHAREABLE);
if (com->irqres) {
ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
INTR_TYPE_TTY | INTR_FAST,
==== //depot/projects/hammer/sys/kern/kern_intr.c#13 (text+ko) ====
@@ -244,8 +244,6 @@
if (ithread == NULL || name == NULL || handler == NULL)
return (EINVAL);
- if ((flags & INTR_FAST) !=0)
- flags |= INTR_EXCL;
ih = malloc(sizeof(struct intrhand), M_ITHREAD, M_WAITOK | M_ZERO);
ih->ih_handler = handler;
@@ -254,7 +252,7 @@
ih->ih_ithread = ithread;
ih->ih_pri = pri;
if (flags & INTR_FAST)
- ih->ih_flags = IH_FAST | IH_EXCLUSIVE;
+ ih->ih_flags = IH_FAST;
else if (flags & INTR_EXCL)
ih->ih_flags = IH_EXCLUSIVE;
if (flags & INTR_MPSAFE)
@@ -263,11 +261,24 @@
ih->ih_flags |= IH_ENTROPY;
mtx_lock(&ithread->it_lock);
- if ((flags & INTR_EXCL) !=0 && !TAILQ_EMPTY(&ithread->it_handlers))
+ if ((flags & INTR_EXCL) != 0 && !TAILQ_EMPTY(&ithread->it_handlers))
goto fail;
- if (!TAILQ_EMPTY(&ithread->it_handlers) &&
- (TAILQ_FIRST(&ithread->it_handlers)->ih_flags & IH_EXCLUSIVE) != 0)
- goto fail;
+ if (!TAILQ_EMPTY(&ithread->it_handlers)) {
+ temp_ih = TAILQ_FIRST(&ithread->it_handlers);
+ if (temp_ih->ih_flags & IH_EXCLUSIVE)
+ goto fail;
+ if (flags & INTR_FAST)
+ printf("request for fast interrupt on %s\n",
+ ithread->it_name);
+ if ((ih->ih_flags & IH_FAST) && !(temp_ih->ih_flags & IH_FAST))
+ goto fail;
+ if (flags & INTR_FAST)
+ printf("passed first mismatch test\n");
+ if (!(ih->ih_flags & IH_FAST) && (temp_ih->ih_flags & IH_FAST))
+ goto fail;
+ if (flags & INTR_FAST)
+ printf("passed second mismatch test\n");
+ }
TAILQ_FOREACH(temp_ih, &ithread->it_handlers, ih_next)
if (temp_ih->ih_pri > ih->ih_pri)
==== //depot/projects/hammer/sys/kern/subr_smp.c#7 (text+ko) ====
@@ -112,8 +112,10 @@
{
/* Probe for MP hardware. */
- if (mp_probe_status == 0 || smp_disabled != 0)
+ if (mp_probe_status == 0 || smp_disabled != 0) {
+ mp_ncpus = 1;
return;
+ }
mtx_init(&smp_rv_mtx, "smp rendezvous", NULL, MTX_SPIN);
cpu_mp_start();
==== //depot/projects/hammer/sys/kern/subr_witness.c#17 (text+ko) ====
@@ -285,6 +285,7 @@
{ "ng_node", &lock_class_mtx_spin },
{ "ng_worklist", &lock_class_mtx_spin },
{ "taskqueue_fast", &lock_class_mtx_spin },
+ { "intr table", &lock_class_mtx_spin },
{ "ithread table lock", &lock_class_mtx_spin },
{ "sched lock", &lock_class_mtx_spin },
{ "callout", &lock_class_mtx_spin },
@@ -296,10 +297,8 @@
{ "icu", &lock_class_mtx_spin },
#ifdef SMP
{ "smp rendezvous", &lock_class_mtx_spin },
-#if defined(__i386__) && defined(APIC_IO)
+#if defined(__i386__) || defined(__amd64__)
{ "tlb", &lock_class_mtx_spin },
-#endif
-#ifdef __i386__
{ "lazypmap", &lock_class_mtx_spin },
#endif
#ifdef __sparc64__
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