PERFORCE change 39950 for review

Juli Mallett jmallett at FreeBSD.org
Sat Oct 18 19:29:01 PDT 2003


http://perforce.freebsd.org/chv.cgi?CH=39950

Change 39950 by jmallett at jmallett_dalek on 2003/10/18 19:28:03

	Remove VR4100 bits.

Affected files ...

.. //depot/projects/mips/sys/mips/include/cpuregs.h#11 edit
.. //depot/projects/mips/sys/mips/mips/mips_subr.S#11 edit

Differences ...

==== //depot/projects/mips/sys/mips/include/cpuregs.h#11 (text+ko) ====

@@ -313,15 +313,8 @@
 #define	MIPS3_CONFIG_IC_MASK	0x00000e00	/* Primary I-cache size */
 #define	MIPS3_CONFIG_IC_SHIFT	9
 #define	MIPS3_CONFIG_C_DEFBASE	0x1000		/* default base 2^12 */
-#ifdef MIPS3_4100				/* VR4100 core */
-/* XXXCDC: THIS MIPS3_4100 SPECIAL CASE SHOULD GO AWAY */
-#define	MIPS3_CONFIG_CS		0x00001000	/* cache size mode indication*/
-#define	MIPS3_CONFIG_CACHE_SIZE(config, mask, dummy, shift) \
-	((((config)&MIPS3_CONFIG_CS)?0x400:0x1000) << (((config) & (mask)) >> (shift)))
-#else
 #define	MIPS3_CONFIG_CACHE_SIZE(config, mask, base, shift) \
 	((base) << (((config) & (mask)) >> (shift)))
-#endif
 
 /* External cache enable: Controls L2 for R5000/Rm527x and L3 for Rm7000 */
 #define	MIPS3_CONFIG_SE		0x00001000

==== //depot/projects/mips/sys/mips/mips/mips_subr.S#11 (text+ko) ====

@@ -236,12 +236,7 @@
 	b	4f
 	nop
 1:
-#if defined(MIPS3) && defined(MIPS3_4100)		/* VR4100 core */
-	lw	v0, _C_LABEL(default_pg_mask)	# default_pg_mask declared
-	mtc0	v0, MIPS_COP_0_TLB_PG_MASK	#	in mips_machdep.c
-#else
 	mtc0	zero, MIPS_COP_0_TLB_PG_MASK	# init mask.
-#endif
 	COP0_SYNC
 	_MTC0	a0, MIPS_COP_0_TLB_HI		# init high reg.
 	COP0_SYNC
@@ -280,12 +275,7 @@
 	b	4f
 	nop
 3:
-#if defined(MIPS3) && defined(MIPS3_4100)		/* VR4100 core */
-	lw	v0, _C_LABEL(default_pg_mask)	# default_pg_mask declared
-	mtc0	v0, MIPS_COP_0_TLB_PG_MASK	#	in mips_machdep.c
-#else
 	mtc0	zero, MIPS_COP_0_TLB_PG_MASK	# init mask.
-#endif
 	COP0_SYNC
 	_MTC0	a0, MIPS_COP_0_TLB_HI		# init high reg.
 	COP0_SYNC


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