PERFORCE change 41960 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=41960

Change 41960 by jmallett at jmallett_dalek on 2003/11/10 21:17:17

	Repeat after me:  shifting right N bits minus enough to offset is not
	the same as shifting right N bits and then left an offset.  It's important
	not to get those alignment errors.
	
	While here, allow one of the TLBLo's to be invalid.
	
	Arrrrrrrrrrrrrgh!
	
	Now get to pmap_pinit().

Affected files ...

.. //depot/projects/mips/sys/mips/mips/exception.S#9 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/exception.S#9 (text+ko) ====

@@ -180,7 +180,8 @@
 	 * Shift right logical to get a page index, but leaving
 	 * enough bits to index an array of 64 bit values.
 	 */
-	dsrl	k0, PAGE_SHIFT - 3
+	dsrl	k0, PAGE_SHIFT
+	dsll	k0, 3
 	dla	k1, kptmap
 	/*
 	 * Find the page table, and index it.
@@ -189,27 +190,26 @@
 	addu	k1, k0
 	ld	k0, 0(k1)	/* Even PTE. */
 	andi	k0, PG_V	/* Check validity. */
+	bne	k0, zero, 2f	/* Valid. */
+	nop
+	ld	k0, 8(k1)	/* Odd PTE. */
+	andi	k0, PG_V	/* Check validity. */
 	beq	k0, zero, 1f	/* Invalid. */
 	nop
 	/*
 	 * Valid PTE.  Write the pair.
 	 */
-	ld	k0, 0(k1)	/* Even PTE. */
+2:	ld	k0, 0(k1)	/* Even PTE. */
 	ld	k1, 8(k1)	/* Odd PTE. */
 	/*
 	 * Write TLB entry.
 	 */
 	dmtc0	k0, MIPS_COP_0_TLB_LO0
-	nop
-	nop
 	dmtc0	k1, MIPS_COP_0_TLB_LO1
-	nop
-	nop
 	tlbwr
 	nop
 	nop
 	nop
-	nop
 	eret
 1:	j	BadPTE
 	nop