PERFORCE change 31185 for review

Juli Mallett jmallett at FreeBSD.org
Wed May 14 13:09:00 PDT 2003


http://perforce.freebsd.org/chv.cgi?CH=31185

Change 31185 by jmallett at jmallett_dalek on 2003/05/14 13:08:56

	Move some stuff around, remove cruft.

Affected files ...

.. //depot/projects/mips/sys/mips/include/locore.h#4 edit
.. //depot/projects/mips/sys/mips/include/md_var.h#8 edit

Differences ...

==== //depot/projects/mips/sys/mips/include/locore.h#4 (text+ko) ====

@@ -79,71 +79,6 @@
 uint32_t mips3_cp0_wired_read(void);
 void	mips3_cp0_wired_write(uint32_t);
 
-uint64_t mips3_ld(uint64_t *);
-void	mips3_sd(uint64_t *, uint64_t);
-
-static __inline uint32_t	mips3_lw_a64(uint64_t addr)
-		    __attribute__((__unused__));
-static __inline void	mips3_sw_a64(uint64_t addr, uint32_t val)
-		    __attribute__ ((__unused__));
-
-static __inline uint32_t
-mips3_lw_a64(uint64_t addr)
-{
-	uint32_t addrlo, addrhi;
-	uint32_t rv;
-	uint32_t sr;
-
-	sr = mips_cp0_status_read();
-	mips_cp0_status_write(sr | MIPS3_SR_KX);
-
-	addrlo = addr & 0xffffffff;
-	addrhi = addr >> 32;
-	__asm__ __volatile__ ("		\n\
-		.set push		\n\
-		.set mips3		\n\
-		.set noreorder		\n\
-		.set noat		\n\
-		dsll32	$3, %1, 0	\n\
-		dsll32	$1, %2, 0	\n\
-		dsrl32	$3, $3, 0	\n\
-		or	$1, $1, $3	\n\
-		lw	%0, 0($1)	\n\
-		.set pop		\n\
-	" : "=r"(rv) : "r"(addrlo), "r"(addrhi) : "$1", "$3" );
-
-	mips_cp0_status_write(sr);
-
-	return (rv);
-}
-
-static __inline void
-mips3_sw_a64(uint64_t addr, uint32_t val)
-{
-	uint32_t addrlo, addrhi;
-	uint32_t sr;
-
-	sr = mips_cp0_status_read();
-	mips_cp0_status_write(sr | MIPS3_SR_KX);
-
-	addrlo = addr & 0xffffffff;
-	addrhi = addr >> 32;
-	__asm__ __volatile__ ("			\n\
-		.set push			\n\
-		.set mips3			\n\
-		.set noreorder			\n\
-		.set noat			\n\
-		dsll32	$3, %1, 0		\n\
-		dsll32	$1, %2, 0		\n\
-		dsrl32	$3, $3, 0		\n\
-		or	$1, $1, $3		\n\
-		sw	%0, 0($1)		\n\
-		.set pop			\n\
-	" : : "r"(val), "r"(addrlo), "r"(addrhi) : "$1", "$3" );
-
-	mips_cp0_status_write(sr);
-}
-
 /*
  * A vector with an entry for each mips-ISA-level dependent
  * locore function, and macros which jump through it.
@@ -159,12 +94,8 @@
 	void (*wbflush)(void);
 } mips_locore_jumpvec_t;
 
-void	mips_set_wbflush(void (*)(void));
 void	mips_wait_idle(void);
 
-void	stacktrace(void);
-void	logstacktrace(void);
-
 /*
  * The "active" locore-fuction vector, and
  */
@@ -210,10 +141,6 @@
  * such as cache size, from locore to higher-level code (e.g., pmap).
  */
 
-extern int	mips_num_tlb_entries;
-
-void mips_pagecopy(caddr_t dst, caddr_t src);
-void mips_pagezero(caddr_t dst);
 
 #ifdef __HAVE_MIPS_MACHDEP_CACHE_CONFIG
 void mips_machdep_cache_config(void);

==== //depot/projects/mips/sys/mips/include/md_var.h#8 (text+ko) ====

@@ -31,6 +31,8 @@
 extern	vm_offset_t kstack0;
 extern	vm_paddr_t kstack0_phys;
 
+extern	int mips_num_tlb_entries;
+
 extern	int cpu_id;
 extern	int fpu_id;
 


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