PERFORCE change 28891 for review

[Marcel Moolenaar]

http://perforce.freebsd.org/chv.cgi?CH=28891

Change 28891 by marcel at marcel_nfs on 2003/04/13 15:22:23

	Disable the high FP registers by default. While here, add some
	explicit bundling.

Affected files ...

.. //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#9 edit

Differences ...

==== //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#9 (text+ko) ====

@@ -51,22 +51,33 @@
  * register r8.
  */
 ENTRY(__start, 1)
+{	.mlx
 	mov	ar.rsc=0
 	movl	r16=ia64_vector_table	// set up IVT early
 	;;
+}
+{	.mlx
 	mov	cr.iva=r16
 	movl	r16=kstack
 	;;
+}
+{	.mmi
 	srlz.i
 	;;
+	ssm	IA64_PSR_DFH
 	mov	r17=KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
 	;;
+}
+{	.mlx
 	add	sp=r16,r17		// proc0's stack
 	movl	gp=__gp			// find kernel globals
 	;;
+}
+{	.mlx
 	mov	ar.bspstore=r16		// switch backing store
 	movl	r16=pa_bootinfo
 	;;
+}
 	st8	[r16]=r8		// save the PA of the bootinfo block
 	loadrs				// invalidate regs
 	;;
@@ -107,7 +118,7 @@
 	.prologue
 	.save	rp,r0
 	.body
-	
+
 	br.call.sptk.many rp=mi_startup
 
 	// Should never happen
@@ -277,7 +288,7 @@
 	;;
 1:	mov	r16 = ip
 	add	r17 = 2f-1b, r17
-	movl	r18 = (IA64_PSR_AC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_IT|IA64_PSR_BN)
+	movl	r18 = (IA64_PSR_AC|IA64_PSR_BN|IA64_PSR_DFH|IA64_PSR_DT|IA64_PSR_IT|IA64_PSR_RT)
 	;;
 	add	r17 = r17, r16
 	mov	cr.ipsr = r18