test results: HW context switching patch and experimental Xorg repo on T430s
Johannes Dieterich
dieterich.joh at gmail.com
Sun Sep 14 13:02:04 UTC 2014
Dear all,
please CC me, as I am not subscribed.
I included the HW context switch on a Thinkpad T430s (dual Intel HD4000
graphics and NVIDIA Optimus, the later is disabled) and merged the xorg
repo in as per wiki instructions.
Intel GPU is:
vgapci0 at pci0:0:2:0: class=0x030000 card=0x220017aa chip=0x01668086
rev=0x09 hdr=0x00
vendor = 'Intel Corporation'
device = '3rd Gen Core processor Graphics Controller'
class = display
subclass = VGA
bar [10] = type Memory, range 64, base 0xf0000000, size 4194304,
enabled
bar [18] = type Prefetchable Memory, range 64, base 0xe0000000, size
268435456, enabled
bar [20] = type I/O Port, range 32, base 0x5000, size 64, enabled
cap 05[90] = MSI supports 1 message enabled with 1 message
cap 01[d0] = powerspec 2 supports D0 D3 current D0
cap 13[a4] = PCI Advanced Features: FLR TP
Everything works very nicely, interestingly though with the exception of
glxgears which segfaults, I get a core and this is the backtrace:
(gdb) bt
#0 0x0000000806183623 in __driDriverGetExtensions_i965 () from
/usr/local/lib/dri/i965_dri.so
#1 0x000000080613b52f in __driDriverGetExtensions_i965 () from
/usr/local/lib/dri/i965_dri.so
#2 0x000000000040298e in ?? ()
#3 0x0000000000402745 in ?? ()
#4 0x0000000000401b0f in ?? ()
#5 0x0000000800622000 in ?? ()
#6 0x0000000000000000 in ?? ()
Is this along the same lines as the known Xorg -configure segfault? Nothing
big though.
More importantly: thanks to everybody involved for the great work, can't
wait for all these improvements to make it into trunk (also longing for
OpenCL at radeon support, different story...)!
Please find some more details attached, let me know if there is more to be
sent or tested.
Best
Johannes
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