[RFC] disable hardware register byteswap, fixes Merlin AR9220 on AR71xx

[Adrian Chadd]

Hi all,

After quite a bit of hackery, hair tearing and other assorted stuff, I
finally nailed the AR9220 + AR71xx instability that we've all been
seeing.

It seems to be a combination of:

* incorrect power supplies being used (yes, I found that a board would
work fine until you started interacting with the NIC, at which point
it'd throw an immediate parity error - but then subsequent register
poking via the debugger would come out fine);
* _maybe_ some PCI bus glue issues? The PCI glue now looks a lot more
like what's in Linux/Atheros code.
* hardware register content byteswapping.

The last one is a bit unfortunate. Here's a patch that pushes the
register space byte swapping back into software, rather than hardware.
I've given it a good thrashing on my AR71xx boards with various AR9220
NICs and they all work a-ok now, with no panics and no "weird stuff."

I have no idea (yet) whether it's a timing issue with the PCI
NIC/bus/controller, whether the hardware swizzling is just plain
broken in some situations .. but what I don't want to do is turn all
of this off without understanding what the root cause is.

So if you've been dying (heh) to play with FreeBSD-HEAD on the
DIR-825, or any other atheros MIPS + AR9220 board, here's your chance.
I've had it rock solid on my AP96 and Routerstation / Routerstation
pro boards for the last couple of days. The DIR-825 is based on the
AP96 design (different switch PHY) so I would be very surprised to
find it unstable.

I may soon just give in and commit it, with a long explanation as to
why I'm disabling it. If people would like it resurrected for whatever
reason then the patch(es) will be in SVN history.

As a data point - ath5k, ath9k and the Atheros reference driver all
have the hardware register byteswap disabled. I'd rather not disable
it without having firm evidence it's broken. I may also tidy up the
register access stuff and make it all a compile time option.

Thanks,



Adrian
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