AP performance (again): txpower regulation

[Adrian Chadd]

Hi,

Well. Let's begin by looking at the code (in
sys/dev/ath/ath_hal/ar5212) and see what TX power parameters are
programmed in.

The function is ar5212_xmit.c:ar5212SetTransmitPower().

The registers you need to care about are the ones set in there.

You can use athpeek to find out what's going on:

cynthia:ar5212 adrian$ fgrep AR_PHY_POWER *h
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE1	0x9934
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE2	0x9938
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE_MAX	0x993c
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE	0x00000040
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE3	0xA234
ar5212phy.h:#define	AR_PHY_POWER_TX_RATE4	0xA238

then:

athpeek 0x9934
athpeek 0x9938
athpeek 0x993c
athpeek 0xa234
athpeek 0xa238

The RATE1 to RATE4 registers should change as you change the interface
TX power. If they don't, we've got a problem.

Each register is broken up into 4 8 bit fields, each containing a 6
bit tx power value in 0.5 dBm. (ie a value of 10 == 5 dBm.) There's
some code in the AR5212 HAL to handle EEPROM TX power offsets; it's
possible that it's causing some issues here.

Also, make sure you don't have TPC enabled. (sysctl dev.ath.0.tpc).
I'd love to sit down and try to get TPC working, but I lack all the
test kit required.

Good luck!


Adrian