wrmsr to register 0x49(0x1) on vcpu x

Frank Ebert frank.ebert at freenet.de
Sat May 12 09:23:22 UTC 2018


Hi Josh,


thank you very much for your reply. I also assume that it has something
to do with spectre, because the changelog says "Update AGESA 1.0.0.5“.
AGESA seems to be microcode for AMD CPUs. But 1.0.0.5 appears to be too
old (?) to include code for spectre, isn’t it?

I have checked the CPU features. Attached you find my dmesg before and
after the BIOS-Update:

Full output before BIOS upgrade:

CPU: AMD Ryzen Threadripper 1950X 16-Core Processor  (3393.70-MHz
K8-class CPU) Origin="AuthenticAMD" Id=0x800f11  Family=0x17
Model=0x1  Stepping=1
Features=0x178bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2,HTT>
Features2=0x7ed8320b<SSE3,PCLMULQDQ,MON,SSSE3,FMA,CX16,SSE4.1,SSE4.2,MOVBE,POPCNT,AESNI,XSAVE,OSXSAVE,AVX,F16C,RDRAND>
AMD Features=0x2e500800<SYSCALL,NX,MMX+,FFXSR,Page1GB,RDTSCP,LM> AMD
Features2=0x35c233ff<LAHF,CMP,SVM,ExtAPIC,CR8,ABM,SSE4A,MAS,Prefetch,OSVW,SKINIT,WDT,TCE,Topology,PCXC,PNXC,DBE,PL2I,MWAITX>
Structured Extended
Features=0x209c01a9<FSGSBASE,BMI1,AVX2,SMEP,BMI2,RDSEED,ADX,SMAP,CLFLUSHOPT,SHA>
XSAVE Features=0xf<XSAVEOPT,XSAVEC,XINUSE,XSAVES> SVM:
NP,NRIP,VClean,AFlush,DAssist,NAsids=32768 TSC: P-state invariant,
performance statistics

Full output after BIOS upgrade:

CPU: AMD Ryzen Threadripper 1950X 16-Core Processor  (3393.72-MHz
K8-class CPU) Origin="AuthenticAMD"  Id=0x800f11  Family=0x17
Model=0x1  Stepping=1
Features=0x178bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2,HTT>
Features2=0x7ed8320b<SSE3,PCLMULQDQ,MON,SSSE3,FMA,CX16,SSE4.1,SSE4.2,MOVBE,POPCNT,AESNI,XSAVE,OSXSAVE,AVX,F16C,RDRAND>
AMD Features=0x2e500800<SYSCALL,NX,MMX+,FFXSR,Page1GB,RDTSCP,LM> AMD
Features2=0x35c233ff<LAHF,CMP,SVM,ExtAPIC,CR8,ABM,SSE4A,MAS,Prefetch,OSVW,SKINIT,WDT,TCE,Topology,PCXC,PNXC,DBE,PL2I,MWAITX>
Structured Extended
Features=0x209c01a9<FSGSBASE,BMI1,AVX2,SMEP,BMI2,RDSEED,ADX,SMAP,CLFLUSHOPT,SHA>
XSAVE Features=0xf<XSAVEOPT,XSAVEC,XINUSE,XSAVES> SVM:
NP,NRIP,VClean,AFlush,DAssist,NAsids=32768 TSC: P-state invariant,
performance statistics

As you can see, I don't have "IBPB" or "STIBP".

I have checked hw.ibrs_active: hw.ibrs_active: 0

If I can provide or you need further information, please let me know.

Thanx
Frank


Am Tue, 8 May 2018 21:39:48 +1000
schrieb edenist <edenist at edenist.net>:

> Hi Frank,
> 
> While the changelog from Asus is rather lean, I would wager it has to
> do with spectre mitigations introduced by AMD.
> Last month they announced that they had prepared a microcode update to
> address variant 2, and had handed the microcode to motherboard vendors
> to supply as a BIOS update.
> 
> Most of my systems are AMD, though I've yet to see this microcode
> update personally yet due to lazy vendors. That said, it appears they
> have followed intel and introduced an IBRS feature.
> 
> https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
> 
> According to that document, sure enough msr 49 is for IBPB.
> 
> If you check your CPU features in your kernel logs, if the CPU has the
> IBRS feature, both IBPB and STIBP will appear under Structured
> Extended Features.
> On an intel system I have with updated microcode, it shows the
> following: Structured Extended Features3=0xc000000<IBPB,STIBP>
> 
> I'd then check the hw.ibrs_active sysctl to see if it is in use. If
> so, it can be disabled with hw.ibrs_disable.
> 
> Someone more knowledgeable on the inner workings of bhyve can likely
> give more info on the error itself, but I'm unsure if these features
> have even been exposed to guests yet.
> 
> Josh
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