CFT: nested page table integration with amd64/pmap

[Peter Grehan]

> I always wondered about virtualization environments which have pageable
> guest memory - how does the guest kernel handle situations where it
> really needs non-pageable memory? Does is simply "not care" because for
> it the memory access looks just like it isn't paged but is simply very,
> very slow?

  Yes - from the guest's point of view, what it thinks is physical 
memory appears wired.

> What about time-sensitive situations (like the originally
> mentioned PCI-passthrough)?

  PCI passthru is a special case since the h/w requires that the target 
of a DMA transfer is present - there is currently no way for the IOMMU 
to generate the equivalent of page faults. So, for PCI passthru, all of 
guest memory has to be wired host memory.

  For time-sensitive situations, there's not a lot of options other than 
forcing guest memory to be wired, since there isn't visibility into the 
host without having o/s-specific "tools" that could communicate this 
information to the hypervisor.

later,

Peter.